Byron Lathi
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cb426670cd
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Do synthesis with sd controller
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2024-03-10 12:29:08 -07:00 |
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Byron Lathi
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da41e60ee7
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integrate sd controller and super simple tb
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2024-03-10 11:31:07 -07:00 |
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Byron Lathi
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81382925f8
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Update rtl common and sd controller submodules
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2024-03-10 10:24:50 -07:00 |
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Byron Lathi
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96e014567d
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Add sd controller submodule
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2024-03-04 00:06:29 -08:00 |
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Byron Lathi
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358dfdbe75
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Add sdram io to fpga
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2024-03-03 23:31:02 -08:00 |
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Byron Lathi
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aee04b777a
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Fix sdram sim
Just need to add the RTL_SIM define
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2024-03-03 21:33:28 -08:00 |
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Byron Lathi
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10a72d8e1f
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Add sdram, don't think it works though
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2024-03-03 20:43:37 -08:00 |
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Byron Lathi
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01b1ecbcac
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Add basic sim
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2024-03-03 17:09:17 -08:00 |
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Byron Lathi
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ab9da189d1
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Build software correctly, ignore debugger files
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2024-03-03 14:50:40 -08:00 |
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Byron Lathi
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42fbc17a2a
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Add test code and top level Makefile
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2024-03-03 12:52:44 -08:00 |
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Byron Lathi
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cd1dfa39cb
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Fix PLL settings, add cpu output clock
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2024-03-03 09:45:04 -08:00 |
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Byron Lathi
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0752220b0e
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Add basic project with cpu, ram and rom
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2024-03-02 22:46:48 -08:00 |
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