Commit Graph

39 Commits

Author SHA1 Message Date
Byron Lathi
e805b19eca Add some flops to the mapper
This is NOT how to do CDC
2023-11-30 17:40:21 -08:00
Byron Lathi
89a1a70917 Revert sdram state machine upgrade 2023-11-24 17:54:03 -08:00
Byron Lathi
8721c816fc Move fast signals to fast reset 2023-11-23 12:06:19 -08:00
Byron Lathi
aba37ec98d Decouple spi_clk from cpu_clk 2023-11-23 11:49:16 -08:00
Byron Lathi
1714a1e6da add uart interrupt 2023-11-21 18:47:16 -08:00
Byron Lathi
4392a01de8 #53 Reduce interrupts to 128 2023-11-21 08:17:36 -08:00
Byron Lathi
7c24389b10 Update RTC code test 2023-11-19 13:50:00 -08:00
Byron Lathi
7002aeebe6 Add rtc code test 2023-11-19 11:58:37 -08:00
Byron Lathi
5433b4c6dc Merge from main 2023-11-18 17:41:59 -08:00
Byron Lathi
dea6227958 Add irq code tb 2023-11-18 13:55:29 -08:00
Byron Lathi
95b0e874cf Implement RTC 2023-11-17 21:51:09 -08:00
Byron Lathi
27066a7ace Test interrupt priority 2023-11-16 18:54:25 -08:00
Byron Lathi
b259d7f084 Fix edge trigger, reorganize testbench 2023-11-16 18:28:48 -08:00
Byron Lathi
5d4bad80a2 Fix level triggered test, add to ci 2023-11-16 08:14:58 -08:00
Byron Lathi
e163e9461f Fix makefile, fix how interrupts are triggered 2023-11-15 18:46:18 -08:00
Byron Lathi
40c54e26c0 Demonstrate basic interrupt functionality 2023-11-15 08:42:02 -08:00
Byron Lathi
2b248db94f Add skeleton of interrupt controller 2023-11-15 08:27:29 -08:00
Byron Lathi
0fe57c6ad5 Add beginnings of interrupt controller 2023-10-31 23:44:09 -07:00
Byron Lathi
ac5564d03d Add test program for mapper, fix reset bug 2023-10-20 08:27:51 -07:00
Byron Lathi
5a8d15de94 Refactor for FPGA synthesis 2023-10-19 18:57:42 -07:00
Byron Lathi
03456607c9 Route all addresses through mapper 2023-10-19 18:34:39 -07:00
Byron Lathi
69e443d223 Add mapped address output and test 2023-10-18 08:54:23 -07:00
Byron Lathi
35d4ea968e Update testbench, fix off by 1 2023-10-18 08:40:00 -07:00
Byron Lathi
e621d4047b Add mapper and testbench 2023-10-16 23:45:33 -07:00
Byron Lathi
360eecf3ca Revert super6502 back to before mapper 2023-10-15 21:48:03 -07:00
Byron Lathi
a7b7f4fe35 Update build 2023-10-15 21:27:11 -07:00
Byron Lathi
155e89240a Merge from master 2023-10-15 18:58:25 -07:00
Byron Lathi
e768b245bd rework state machine 2023-10-15 18:24:19 -07:00
Byron Lathi
362c9f140f Fix synthesis issue 2023-10-15 13:52:55 -07:00
Byron Lathi
afd8de92cc Fix sdram wrapper state machine 2023-10-15 13:12:46 -07:00
Byron Lathi
673386f9f9 Change clk_2 to clk_cpu 2023-10-12 19:32:12 -07:00
Byron Lathi
4925354f53 Fix uart status multiple drivers 2023-09-27 23:02:53 -07:00
Byron Lathi
9e19a1eb72 Disable sdr debug, initialize uart status 2023-09-27 21:14:09 -07:00
Byron Lathi
c2dd5d616b Gate rdy behind sdram_cs #28 2023-09-25 23:45:23 -07:00
Byron Lathi
bc0ab7eb54 Fix infinite loop 2023-09-22 19:46:25 -07:00
Byron Lathi
1f503b2d80 update sim environment 2023-09-21 20:35:52 -07:00
Byron Lathi
76aea3180a Move mapper into src folder 2023-09-18 23:00:27 -07:00
Byron Lathi
66bebf476e Merge from master 2023-09-18 20:08:59 -07:00
Byron Lathi
c466c62969 Resolve "Organize Project Better" 2023-09-19 02:57:26 +00:00