Files
super6502/hw/super6502_fpga/src/sim/sources.list
2024-03-15 21:02:53 -07:00

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hvl/sim_top.sv
sub/verilog-6502/ALU.v
sub/verilog-6502/cpu_65c02.v
sub/sim_sdram/generic_sdr.v
sub/verilog-sd-emulator/src/sd_card_command.sv
sub/verilog-sd-emulator/src/sd_card_emu.sv
sub/verilog-sd-emulator/src/sd_card_state_controller.sv
sub/verilog-sd-emulator/src/sd_card_data.sv