bslathi19/super6502
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
102 Commits 10 Branches 0 Tags
5c32fe808ed726c60d72ecea246d72f6acb37973
Go to file
Clone
Open with VS Code Open with VSCodium Open with Intellij IDEA
Download ZIP Download TAR.GZ Download BUNDLE
Byron Lathi 5c32fe808e Add board-io, replace sevenseg in sw
2022-03-18 01:27:55 +00:00
hw
Add board-io, replace sevenseg in sw
2022-03-18 01:27:55 +00:00
sw
Add board-io, replace sevenseg in sw
2022-03-18 01:27:55 +00:00
.gitlab-ci.yml
Add platform generation to build stage
2022-03-17 14:25:26 -05:00
Description
No description provided
5.5 MiB
Languages
SystemVerilog 47.7%
Verilog 41.8%
Python 4.8%
VHDL 2%
Assembly 2%
Other 1.6%