627b6a746a36ca87f2c19fd58b1dc69515fa2312
This also increases the number of registers to 4, one more for the high pair of displays, and a final one for a mask register which has not been implemented yet.
Description
No description provided
Languages
SystemVerilog
47.7%
Verilog
41.8%
Python
4.8%
VHDL
2%
Assembly
2%
Other
1.6%