Byron Lathi 80d49b4f87 Update makefile
Generates listing files and a map file now.
2022-03-10 10:25:36 -06:00
2022-03-08 15:26:01 -06:00
2022-03-10 10:25:36 -06:00
2022-03-08 15:26:01 -06:00
Description
No description provided
5.5 MiB
Languages
SystemVerilog 47.7%
Verilog 41.8%
Python 4.8%
VHDL 2%
Assembly 2%
Other 1.6%