70 lines
2.4 KiB
Markdown
70 lines
2.4 KiB
Markdown
# Memory Mapper
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## Overview
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The memory mapper gives expands the CPU's address space from 16 bits to 25.
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It can be expanded to be 28 bits, but only 25 are needed to access all of
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sdram.
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Its architecture is show below:
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There are 32 16 bit registers: One for each 4k page in the virtual address
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space. The memory mapper is always enabled, but at reset it is identity
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mapped, i.e. register _n_ will be reset to value _n_.
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## Interface
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The Memory mapper is composed of 32 identical 16 bit mapping registers
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The chip select should be calculated based on the virtual address. If not,
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it will be possible for the CPU to map away access to the mapper, at which
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point it is impossible to change the mappings without a reset.
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## Registers
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### Register Map
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| Address | Read | Write |
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|--------- |-------------- |-------------- |
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| 00 | MM0 Low | MM0 Low |
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| 01 | MM0 High | MM0 High |
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| 02 | MM1 Low | MM1 Low |
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| 03 | MM1 High | MM1 High |
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| 04 | MM2 Low | MM2 Low |
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| 05 | MM2 High | MM2 High |
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| 06 | MM3 Low | MM3 Low |
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| 07 | MM3 High | MM3 High |
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| 08 | MM4 Low | MM4 Low |
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| 09 | MM4 High | MM4 High |
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| 0A | MM5 Low | MM5 Low |
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| 0B | MM5 High | MM5 High |
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| 0C | MM6 Low | MM6 Low |
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| 0D | MM6 High | MM6 High |
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| 0E | MM7 Low | MM7 Low |
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| 0F | MM7 High | MM7 High |
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| 10 | MM8 Low | MM8 Low |
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| 11 | MM8 High | MM8 High |
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| 12 | MM9 Low | MM9 Low |
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| 13 | MM9 High | MM9 High |
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| 14 | MM10 Low | MM10 Low |
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| 15 | MM10 High | MM10 High |
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| 16 | MM11 Low | MM11 Low |
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| 17 | MM11 High | MM11 High |
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| 18 | MM12 Low | MM12 Low |
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| 19 | MM12 High | MM12 High |
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| 1A | MM13 Low | MM13 Low |
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| 1B | MM13 High | MM13 High |
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| 1C | MM14 Low | MM14 Low |
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| 1D | MM14 High | MM14 High |
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| 1E | MM15 Low | MM15 Low |
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| 1F | MM15 High | MM15 High |
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### MMn Low
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Low memory map data. Becomes bits [19:12] of physical address.
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### MMn High
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High memory map data. Becomes bits [27:20] of physical address. |