Byron Lathi ca42bc4915 Merge branch 'no-sram' into 'master' ...

Remove fpga RAM

See merge request bslathi19/super6502!9

2022-03-21 19:11:20 +00:00

hw

Remove fpga RAM

2022-03-21 14:01:16 -05:00

sw

Remove RAM memory section

2022-03-21 14:06:12 -05:00

.gitlab-ci.yml

Add platform generation to build stage

2022-03-17 14:25:26 -05:00

Description

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5.5 MiB

Languages

SystemVerilog 47.7%

Verilog 41.8%

Python 4.8%

VHDL 2%

Assembly 2%

Other 1.6%