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Created with Raphaël 2.2.010Mar26Feb252423Fix bitstream name in cimastermasterAdd output demux, working switchAdd mac lookup table, read and write logicAdd mac separateGet top level sim workingAdd top level simAdd output_demux simAdd sim to ciAdd more simAdd assertionsAdd sanity ethernet rx testAdd simSynth fixesBig commit that probably doesn't workAdd mac lookup docAdd architectureAdd module load to init_env.shAdd ciMore tcl constraintsAdd arbitrary tcls, for constraining ip fifosChange to 100 MHz, add io constraintsAdd constraintsAdd fpga infraAdd ethernetAdd interfaces, change modulepath to relativeAdd docs, submodulesCreate Project