Alex Forencich
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0f5bc4eba8
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eth: Update VCU108 example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 21:49:33 -08:00 |
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Alex Forencich
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31081b6a23
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eth: Update fb2CG@KU15P example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 21:49:09 -08:00 |
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Alex Forencich
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c2858c183e
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eth: Fix typo in fb2CG@KU15P example design
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 21:28:42 -08:00 |
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Alex Forencich
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a7b2db9c20
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eth: Update Nexus K35-S/K3P-S example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 20:50:32 -08:00 |
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Alex Forencich
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ae05128b44
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eth: Update Nexus K3P-Q example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 20:46:30 -08:00 |
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Alex Forencich
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4682591ec3
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eth: Update ZCU111 example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 18:08:19 -08:00 |
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Alex Forencich
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3c40ce964b
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eth: Update AS02MC04 example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 17:59:46 -08:00 |
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Alex Forencich
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40cc51d062
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eth: Update ZCU106 example design testbench to test both 32-bit and 64-bit configurations
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 15:37:49 -08:00 |
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Alex Forencich
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7dbe595e5b
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eth: Update ADM-PCIE-9V3 example design to use 32-bit MACs at 10G
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 15:36:49 -08:00 |
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Alex Forencich
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77313e1ed0
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eth: Add example design for Alibaba AS02MC04
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-05 14:35:33 -08:00 |
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Alex Forencich
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159c9d6241
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eth: Update example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-10-02 16:11:07 -07:00 |
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Alex Forencich
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553dea534e
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eth/example/HTG_ZRF8: Add example design for HTG-ZRF8-EM and HTG-ZRF8-R2
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-09-06 07:03:35 -07:00 |
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Alex Forencich
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0d7e0cf590
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eth/example/ZCU111: Clean up RFDC clocking
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-09-05 07:30:30 -07:00 |
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Alex Forencich
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6c9026bccf
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eth/example/HTG9200: Fix refclock frequency in testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-09-05 07:15:26 -07:00 |
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Alex Forencich
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07ae2ba989
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eth: Add RFDC to ZCU111 example design
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-24 11:26:14 -07:00 |
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Alex Forencich
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4c43b68f94
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eth: Add 6QSFP FMC support to HTG9200 example design
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-20 16:24:39 -07:00 |
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Alex Forencich
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cf0ec74849
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eth: HTG9200 example design cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-20 06:37:14 -07:00 |
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Alex Forencich
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d4089096ae
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example: Add example design for HTG-9200
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-02 21:19:58 -07:00 |
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Alex Forencich
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2065151c01
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eth: Update 10G-only example designs to use 32-bit MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-17 23:19:30 -07:00 |
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Alex Forencich
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280e5129b8
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example: Build all MAC variants for ZCU106
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:48:22 -07:00 |
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Alex Forencich
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4e66dd0f98
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eth: Rename gearbox start signals to sync
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-12 15:45:07 -07:00 |
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Alex Forencich
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e4762b7a8c
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eth: Add support for synchronous gearbox to PHY, MAC+PHY, and GT wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-30 21:14:54 -07:00 |
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Alex Forencich
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f31ba113d2
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example: Fix KCU105 TX disable pin constraints
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-30 18:54:45 -07:00 |
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Alex Forencich
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8a77ee9fc7
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eth: Add reset logic, QPLL control signals, and additional configuration parameters for US/US+ GTH/GTY transceivers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-21 21:06:45 -07:00 |
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Alex Forencich
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66b53d98a2
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Reorganize repository
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-05-18 12:25:59 -07:00 |
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