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eth: Remove FIFO pipeline registers for statistics FIFOs in distributed RAM

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-04-17 00:34:22 -07:00
parent 800c6a9a0b
commit 0044782224
1 changed files with 2 additions and 0 deletions
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2
rtl/eth/taxi_eth_mac_stats.sv
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@@ -226,6 +226,7 @@ tx_stats_inst (
taxi_axis_async_fifo #(
.DEPTH(32),
.RAM_PIPELINE(0),
.FRAME_FIFO(1'b0),
.DROP_BAD_FRAME(1'b0),
.DROP_WHEN_FULL(1'b0)
@@ -389,6 +390,7 @@ rx_stats_inst (
taxi_axis_async_fifo #(
.DEPTH(32),
.RAM_PIPELINE(0),
.FRAME_FIFO(1'b0),
.DROP_BAD_FRAME(1'b0),
.DROP_WHEN_FULL(1'b0)