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eth: Fix transcoding of signal ordered sets in XGMII-BASE-R encode module

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2026-06-19 16:49:32 -07:00
parent 62c544444b
commit 0220b73b8f
1 changed files with 16 additions and 0 deletions
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16
src/eth/rtl/taxi_xgmii_baser_enc.sv
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@@ -281,6 +281,10 @@ always_comb begin
// ordered set in lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], O_SEQ_OS, encoded_ctrl[27:0], BLOCK_TYPE_OS_4};
tx_bad_block_next = encode_err[3:0] != 0;
end else if (xgmii_txc_int == 8'h1f && xgmii_txd_int[39:32] == XGMII_SIG_OS) begin
// ordered set in lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], O_SIG_OS, encoded_ctrl[27:0], BLOCK_TYPE_OS_4};
tx_bad_block_next = encode_err[3:0] != 0;
end else if (xgmii_txc_int == 8'h1f && xgmii_txd_int[39:32] == XGMII_START) begin
// start in lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], 4'd0, encoded_ctrl[27:0], BLOCK_TYPE_START_4};
@@ -289,10 +293,18 @@ always_comb begin
// ordered set in lane 0, start in lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], 4'd0, O_SEQ_OS, xgmii_txd_int[31:8], BLOCK_TYPE_OS_START};
tx_bad_block_next = 1'b0;
end else if (xgmii_txc_int == 8'h11 && xgmii_txd_int[7:0] == XGMII_SIG_OS && xgmii_txd_int[39:32] == XGMII_START) begin
// ordered set in lane 0, start in lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], 4'd0, O_SIG_OS, xgmii_txd_int[31:8], BLOCK_TYPE_OS_START};
tx_bad_block_next = 1'b0;
end else if (xgmii_txc_int == 8'h11 && xgmii_txd_int[7:0] == XGMII_SEQ_OS && xgmii_txd_int[39:32] == XGMII_SEQ_OS) begin
// ordered set in lane 0 and lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], O_SEQ_OS, O_SEQ_OS, xgmii_txd_int[31:8], BLOCK_TYPE_OS_04};
tx_bad_block_next = 1'b0;
end else if (xgmii_txc_int == 8'h11 && xgmii_txd_int[7:0] == XGMII_SIG_OS && xgmii_txd_int[39:32] == XGMII_SIG_OS) begin
// ordered set in lane 0 and lane 4
encoded_tx_data_next = {xgmii_txd_int[63:40], O_SIG_OS, O_SIG_OS, xgmii_txd_int[31:8], BLOCK_TYPE_OS_04};
tx_bad_block_next = 1'b0;
end else if (xgmii_txc_int == 8'h01 && xgmii_txd_int[7:0] == XGMII_START) begin
// start in lane 0
encoded_tx_data_next = {xgmii_txd_int[63:8], BLOCK_TYPE_START_0};
@@ -301,6 +313,10 @@ always_comb begin
// ordered set in lane 0
encoded_tx_data_next = {encoded_ctrl[55:28], O_SEQ_OS, xgmii_txd_int[31:8], BLOCK_TYPE_OS_0};
tx_bad_block_next = encode_err[7:4] != 0;
end else if (xgmii_txc_int == 8'hf1 && xgmii_txd_int[7:0] == XGMII_SIG_OS) begin
// ordered set in lane 0
encoded_tx_data_next = {encoded_ctrl[55:28], O_SIG_OS, xgmii_txd_int[31:8], BLOCK_TYPE_OS_0};
tx_bad_block_next = encode_err[7:4] != 0;
end else if (xgmii_txc_int == 8'hff && xgmii_txd_int[7:0] == XGMII_TERM) begin
// terminate in lane 0
encoded_tx_data_next = {encoded_ctrl[55:7], 7'd0, BLOCK_TYPE_TERM_0};