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cndm: Add PCIe configuration shim instance to read extended tag enable bit
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -2,4 +2,5 @@ cndm_micro_pcie_us.sv
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cndm_micro_core.f
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../lib/taxi/src/pcie/rtl/taxi_pcie_us_axil_master.sv
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../lib/taxi/src/pcie/rtl/taxi_pcie_us_msi.sv
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../lib/taxi/src/pcie/rtl/taxi_pcie_us_cfg.sv
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../lib/taxi/src/dma/rtl/taxi_dma_if_pcie_us.f
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@@ -175,6 +175,8 @@ logic [7:0] pcie_tx_fc_nph_av;
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logic [7:0] pcie_tx_fc_ph_av;
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logic [11:0] pcie_tx_fc_pd_av;
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logic ext_tag_en;
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assign cfg_fc_sel = 3'b100;
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taxi_dma_desc_if #(
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@@ -333,7 +335,7 @@ dma_if_inst (
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*/
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.read_enable(1'b1),
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.write_enable(1'b1),
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.ext_tag_en(1'b0), // TODO
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.ext_tag_en(ext_tag_en),
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.rcb_128b(cfg_rcb_status[0]),
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.requester_id('0),
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.requester_id_en(1'b0),
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@@ -383,6 +385,36 @@ dma_if_inst (
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.stat_wr_tx_stall(stat_wr_tx_stall)
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);
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taxi_pcie_us_cfg #(
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.PF_COUNT(1),
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.VF_COUNT(0),
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.VF_OFFSET(m_axis_pcie_rq.USER_W == 60 ? 64 : 4),
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.PCIE_CAP_OFFSET(m_axis_pcie_rq.USER_W == 60 ? 12'h0C0 : 12'h070)
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)
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cfg_inst (
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.clk(pcie_clk),
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.rst(pcie_rst),
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/*
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* Configuration outputs
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*/
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.ext_tag_en(ext_tag_en),
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.max_read_req_size(),
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.max_payload_size(),
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/*
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* Interface to Ultrascale PCIe IP core
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*/
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.cfg_mgmt_addr(cfg_mgmt_addr),
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.cfg_mgmt_function_number(cfg_mgmt_function_number),
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.cfg_mgmt_write(cfg_mgmt_write),
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.cfg_mgmt_write_data(cfg_mgmt_write_data),
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.cfg_mgmt_byte_enable(cfg_mgmt_byte_enable),
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.cfg_mgmt_read(cfg_mgmt_read),
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.cfg_mgmt_read_data(cfg_mgmt_read_data),
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.cfg_mgmt_read_write_done(cfg_mgmt_read_write_done)
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);
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wire [PORTS-1:0] irq;
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wire [31:0] msi_irq = 32'(irq);
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