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eth: Decoding is don't care with termination in lane 0

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-10-04 21:59:20 -07:00
parent caeacadb78
commit 2810b72147
2 changed files with 2 additions and 2 deletions
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2
src/eth/rtl/taxi_axis_baser_rx_32.sv
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@@ -635,7 +635,7 @@ always_ff @(posedge clk) begin
frame_reg <= 1'b0;
end
BLOCK_TYPE_TERM_0[7:4]: begin
input_data_d0 <= 32'd0;
input_data_d0 <= encoded_rx_data_reg; // don't care
term_present_reg <= 1'b1;
term_first_cycle_reg <= 1'b1;
term_lane_reg <= 0;

2
src/eth/rtl/taxi_axis_baser_rx_64.sv
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@@ -281,7 +281,7 @@ always_comb begin
end else if (encoded_rx_data[7]) begin
// terminate
case (encoded_rx_data[6:4])
3'd0: encoded_rx_data_masked = 64'd0;
3'd0: encoded_rx_data_masked = {56'd0, encoded_rx_data[15:8]}; // don't care
3'd1: encoded_rx_data_masked = {56'd0, encoded_rx_data[15:8]};
3'd2: encoded_rx_data_masked = {48'd0, encoded_rx_data[23:8]};
3'd3: encoded_rx_data_masked = {40'd0, encoded_rx_data[31:8]};