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eth: Use 2D array for PFC config

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-02-22 22:08:43 -08:00
parent 7f2ecf9b49
commit 7613cae4f0
13 changed files with 35 additions and 35 deletions
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4
rtl/eth/taxi_eth_mac_10g.sv
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@@ -142,8 +142,8 @@ module taxi_eth_mac_10g #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [15:0] cfg_rx_lfc_opcode = 16'h0001,
input wire logic cfg_rx_lfc_en = 1'b0,
input wire logic [15:0] cfg_rx_pfc_opcode = 16'h0101,

4
rtl/eth/taxi_eth_mac_1g.sv
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@@ -149,8 +149,8 @@ module taxi_eth_mac_1g #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [15:0] cfg_rx_lfc_opcode = 16'h0001,
input wire logic cfg_rx_lfc_en = 1'b0,
input wire logic [15:0] cfg_rx_pfc_opcode = 16'h0101,

4
rtl/eth/taxi_eth_mac_1g_gmii.sv
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@@ -149,8 +149,8 @@ module taxi_eth_mac_1g_gmii #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [15:0] cfg_rx_lfc_opcode = 16'h0001,
input wire logic cfg_rx_lfc_en = 1'b0,
input wire logic [15:0] cfg_rx_pfc_opcode = 16'h0101,

4
rtl/eth/taxi_eth_mac_1g_rgmii.sv
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@@ -148,8 +148,8 @@ module taxi_eth_mac_1g_rgmii #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [15:0] cfg_rx_lfc_opcode = 16'h0001,
input wire logic cfg_rx_lfc_en = 1'b0,
input wire logic [15:0] cfg_rx_pfc_opcode = 16'h0101,

4
rtl/eth/taxi_eth_mac_mii.sv
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@@ -146,8 +146,8 @@ module taxi_eth_mac_mii #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [15:0] cfg_rx_lfc_opcode = 16'h0001,
input wire logic cfg_rx_lfc_en = 1'b0,
input wire logic [15:0] cfg_rx_pfc_opcode = 16'h0101,

4
rtl/eth/taxi_eth_mac_phy_10g.sv
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@@ -160,8 +160,8 @@ module taxi_eth_mac_phy_10g #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [15:0] cfg_rx_lfc_opcode = 16'h0001,
input wire logic cfg_rx_lfc_en = 1'b0,
input wire logic [15:0] cfg_rx_pfc_opcode = 16'h0101,

22
rtl/eth/taxi_mac_pause_ctrl_tx.sv
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@@ -62,8 +62,8 @@ module taxi_mac_pause_ctrl_tx #
input wire logic [15:0] cfg_tx_pfc_eth_type = 16'h8808,
input wire logic [15:0] cfg_tx_pfc_opcode = 16'h0101,
input wire logic cfg_tx_pfc_en = 1'b0,
input wire logic [8*16-1:0] cfg_tx_pfc_quanta = {8{16'hffff}},
input wire logic [8*16-1:0] cfg_tx_pfc_refresh = {8{16'h7fff}},
input wire logic [7:0][15:0] cfg_tx_pfc_quanta = '{8{16'hffff}},
input wire logic [7:0][15:0] cfg_tx_pfc_refresh = '{8{16'h7fff}},
input wire logic [9:0] cfg_quanta_step,
input wire logic cfg_quanta_clk_en = 1'b1,
@@ -114,14 +114,14 @@ assign mcf_lfc_params[QW*0 +: QW] = lfc_req_reg ? {cfg_tx_lfc_quanta[0 +: 8], cf
wire [18*8-1:0] mcf_pfc_params;
assign mcf_pfc_params[QW*0 +: QW] = {pfc_en_reg, 8'd0};
assign mcf_pfc_params[QW*1 +: QW] = pfc_req_reg[0] ? {cfg_tx_pfc_quanta[QW*0+0 +: 8], cfg_tx_pfc_quanta[QW*0+8 +: 8]} : '0;
assign mcf_pfc_params[QW*2 +: QW] = pfc_req_reg[1] ? {cfg_tx_pfc_quanta[QW*1+0 +: 8], cfg_tx_pfc_quanta[QW*1+8 +: 8]} : '0;
assign mcf_pfc_params[QW*3 +: QW] = pfc_req_reg[2] ? {cfg_tx_pfc_quanta[QW*2+0 +: 8], cfg_tx_pfc_quanta[QW*2+8 +: 8]} : '0;
assign mcf_pfc_params[QW*4 +: QW] = pfc_req_reg[3] ? {cfg_tx_pfc_quanta[QW*3+0 +: 8], cfg_tx_pfc_quanta[QW*3+8 +: 8]} : '0;
assign mcf_pfc_params[QW*5 +: QW] = pfc_req_reg[4] ? {cfg_tx_pfc_quanta[QW*4+0 +: 8], cfg_tx_pfc_quanta[QW*4+8 +: 8]} : '0;
assign mcf_pfc_params[QW*6 +: QW] = pfc_req_reg[5] ? {cfg_tx_pfc_quanta[QW*5+0 +: 8], cfg_tx_pfc_quanta[QW*5+8 +: 8]} : '0;
assign mcf_pfc_params[QW*7 +: QW] = pfc_req_reg[6] ? {cfg_tx_pfc_quanta[QW*6+0 +: 8], cfg_tx_pfc_quanta[QW*6+8 +: 8]} : '0;
assign mcf_pfc_params[QW*8 +: QW] = pfc_req_reg[7] ? {cfg_tx_pfc_quanta[QW*7+0 +: 8], cfg_tx_pfc_quanta[QW*7+8 +: 8]} : '0;
assign mcf_pfc_params[QW*1 +: QW] = pfc_req_reg[0] ? {cfg_tx_pfc_quanta[0][0 +: 8], cfg_tx_pfc_quanta[0][8 +: 8]} : '0;
assign mcf_pfc_params[QW*2 +: QW] = pfc_req_reg[1] ? {cfg_tx_pfc_quanta[1][0 +: 8], cfg_tx_pfc_quanta[1][8 +: 8]} : '0;
assign mcf_pfc_params[QW*3 +: QW] = pfc_req_reg[2] ? {cfg_tx_pfc_quanta[2][0 +: 8], cfg_tx_pfc_quanta[2][8 +: 8]} : '0;
assign mcf_pfc_params[QW*4 +: QW] = pfc_req_reg[3] ? {cfg_tx_pfc_quanta[3][0 +: 8], cfg_tx_pfc_quanta[3][8 +: 8]} : '0;
assign mcf_pfc_params[QW*5 +: QW] = pfc_req_reg[4] ? {cfg_tx_pfc_quanta[4][0 +: 8], cfg_tx_pfc_quanta[4][8 +: 8]} : '0;
assign mcf_pfc_params[QW*6 +: QW] = pfc_req_reg[5] ? {cfg_tx_pfc_quanta[5][0 +: 8], cfg_tx_pfc_quanta[5][8 +: 8]} : '0;
assign mcf_pfc_params[QW*7 +: QW] = pfc_req_reg[6] ? {cfg_tx_pfc_quanta[6][0 +: 8], cfg_tx_pfc_quanta[6][8 +: 8]} : '0;
assign mcf_pfc_params[QW*8 +: QW] = pfc_req_reg[7] ? {cfg_tx_pfc_quanta[7][0 +: 8], cfg_tx_pfc_quanta[7][8 +: 8]} : '0;
assign mcf_valid = mcf_valid_reg;
assign mcf_eth_dst = (PFC_EN && mcf_pfc_sel_reg) ? cfg_tx_pfc_eth_dst : cfg_tx_lfc_eth_dst;
@@ -232,7 +232,7 @@ always_comb begin
pfc_en_next = pfc_act_reg;
pfc_act_next = pfc_req_reg;
for (integer k = 0; k < 8; k = k + 1) begin
pfc_refresh_next[k] = pfc_req_reg[k] ? {cfg_tx_pfc_refresh[QW*k +: QW], {QFB{1'b0}}} : '0;
pfc_refresh_next[k] = pfc_req_reg[k] ? {cfg_tx_pfc_refresh[k], {QFB{1'b0}}} : '0;
end
pfc_send_next = 1'b0;

4
tb/eth/taxi_eth_mac_10g/test_taxi_eth_mac_10g.sv
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@@ -121,8 +121,8 @@ logic [47:0] cfg_tx_pfc_eth_src;
logic [15:0] cfg_tx_pfc_eth_type;
logic [15:0] cfg_tx_pfc_opcode;
logic cfg_tx_pfc_en;
logic [8*16-1:0] cfg_tx_pfc_quanta;
logic [8*16-1:0] cfg_tx_pfc_refresh;
logic [7:0][15:0] cfg_tx_pfc_quanta;
logic [7:0][15:0] cfg_tx_pfc_refresh;
logic [15:0] cfg_rx_lfc_opcode;
logic cfg_rx_lfc_en;
logic [15:0] cfg_rx_pfc_opcode;

4
tb/eth/taxi_eth_mac_1g/test_taxi_eth_mac_1g.sv
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@@ -125,8 +125,8 @@ logic [47:0] cfg_tx_pfc_eth_src;
logic [15:0] cfg_tx_pfc_eth_type;
logic [15:0] cfg_tx_pfc_opcode;
logic cfg_tx_pfc_en;
logic [8*16-1:0] cfg_tx_pfc_quanta;
logic [8*16-1:0] cfg_tx_pfc_refresh;
logic [7:0][15:0] cfg_tx_pfc_quanta;
logic [7:0][15:0] cfg_tx_pfc_refresh;
logic [15:0] cfg_rx_lfc_opcode;
logic cfg_rx_lfc_en;
logic [15:0] cfg_rx_pfc_opcode;

4
tb/eth/taxi_eth_mac_1g_gmii/test_taxi_eth_mac_1g_gmii.sv
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@@ -129,8 +129,8 @@ logic [47:0] cfg_tx_pfc_eth_src;
logic [15:0] cfg_tx_pfc_eth_type;
logic [15:0] cfg_tx_pfc_opcode;
logic cfg_tx_pfc_en;
logic [8*16-1:0] cfg_tx_pfc_quanta;
logic [8*16-1:0] cfg_tx_pfc_refresh;
logic [7:0][15:0] cfg_tx_pfc_quanta;
logic [7:0][15:0] cfg_tx_pfc_refresh;
logic [15:0] cfg_rx_lfc_opcode;
logic cfg_rx_lfc_en;
logic [15:0] cfg_rx_pfc_opcode;

4
tb/eth/taxi_eth_mac_1g_rgmii/test_taxi_eth_mac_1g_rgmii.sv
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@@ -128,8 +128,8 @@ logic [47:0] cfg_tx_pfc_eth_src;
logic [15:0] cfg_tx_pfc_eth_type;
logic [15:0] cfg_tx_pfc_opcode;
logic cfg_tx_pfc_en;
logic [8*16-1:0] cfg_tx_pfc_quanta;
logic [8*16-1:0] cfg_tx_pfc_refresh;
logic [7:0][15:0] cfg_tx_pfc_quanta;
logic [7:0][15:0] cfg_tx_pfc_refresh;
logic [15:0] cfg_rx_lfc_opcode;
logic cfg_rx_lfc_en;
logic [15:0] cfg_rx_pfc_opcode;

4
tb/eth/taxi_eth_mac_mii/test_taxi_eth_mac_mii.sv
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@@ -126,8 +126,8 @@ logic [47:0] cfg_tx_pfc_eth_src;
logic [15:0] cfg_tx_pfc_eth_type;
logic [15:0] cfg_tx_pfc_opcode;
logic cfg_tx_pfc_en;
logic [8*16-1:0] cfg_tx_pfc_quanta;
logic [8*16-1:0] cfg_tx_pfc_refresh;
logic [7:0][15:0] cfg_tx_pfc_quanta;
logic [7:0][15:0] cfg_tx_pfc_refresh;
logic [15:0] cfg_rx_lfc_opcode;
logic cfg_rx_lfc_en;
logic [15:0] cfg_rx_pfc_opcode;

4
tb/eth/taxi_eth_mac_phy_10g/test_taxi_eth_mac_phy_10g.sv
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@@ -139,8 +139,8 @@ logic [47:0] cfg_tx_pfc_eth_src;
logic [15:0] cfg_tx_pfc_eth_type;
logic [15:0] cfg_tx_pfc_opcode;
logic cfg_tx_pfc_en;
logic [8*16-1:0] cfg_tx_pfc_quanta;
logic [8*16-1:0] cfg_tx_pfc_refresh;
logic [7:0][15:0] cfg_tx_pfc_quanta;
logic [7:0][15:0] cfg_tx_pfc_refresh;
logic [15:0] cfg_rx_lfc_opcode;
logic cfg_rx_lfc_en;
logic [15:0] cfg_rx_pfc_opcode;