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eth: Convert UltraScale wrapper to use unpacked arrays for channels

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-10-02 16:10:37 -07:00
parent a74a49cffb
commit 76d4465081
3 changed files with 249 additions and 244 deletions
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151
src/eth/rtl/us/taxi_eth_mac_25g_us.sv
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@@ -36,6 +36,7 @@ module taxi_eth_mac_25g_us #
parameter logic QPLL1_EXT_CTRL = 1'b0,
// GT parameters
// TODO switch to packed arrays; blocked on Verilator bug
parameter logic [CNT-1:0] GT_TX_PD = '0,
parameter logic [CNT-1:0] GT_TX_QPLL_SEL = '0,
parameter logic [CNT-1:0] GT_TX_POLARITY = '0,
@@ -101,21 +102,21 @@ module taxi_eth_mac_25g_us #
/*
* Serial data
*/
output wire logic [CNT-1:0] xcvr_txp,
output wire logic [CNT-1:0] xcvr_txn,
input wire logic [CNT-1:0] xcvr_rxp,
input wire logic [CNT-1:0] xcvr_rxn,
output wire logic xcvr_txp[CNT],
output wire logic xcvr_txn[CNT],
input wire logic xcvr_rxp[CNT],
input wire logic xcvr_rxn[CNT],
/*
* MAC clocks
*/
output wire logic [CNT-1:0] rx_clk,
input wire logic [CNT-1:0] rx_rst_in = '0,
output wire logic [CNT-1:0] rx_rst_out,
output wire logic [CNT-1:0] tx_clk,
input wire logic [CNT-1:0] tx_rst_in = '0,
output wire logic [CNT-1:0] tx_rst_out,
input wire logic [CNT-1:0] ptp_sample_clk = '0,
output wire logic rx_clk[CNT],
input wire logic rx_rst_in[CNT] = '{CNT{1'b0}},
output wire logic rx_rst_out[CNT],
output wire logic tx_clk[CNT],
input wire logic tx_rst_in[CNT] = '{CNT{1'b0}},
output wire logic tx_rst_out[CNT],
input wire logic ptp_sample_clk[CNT] = '{CNT{1'b0}},
/*
* Transmit interface (AXI stream)
@@ -132,24 +133,24 @@ module taxi_eth_mac_25g_us #
* PTP clock
*/
input wire logic [PTP_TS_W-1:0] tx_ptp_ts[CNT] = '{CNT{'0}},
input wire logic [CNT-1:0] tx_ptp_ts_step = '0,
input wire logic tx_ptp_ts_step[CNT] = '{CNT{1'b0}},
input wire logic [PTP_TS_W-1:0] rx_ptp_ts[CNT] = '{CNT{'0}},
input wire logic [CNT-1:0] rx_ptp_ts_step = '0,
input wire logic rx_ptp_ts_step[CNT] = '{CNT{1'b0}},
/*
* Link-level Flow Control (LFC) (IEEE 802.3 annex 31B PAUSE)
*/
input wire logic [CNT-1:0] tx_lfc_req = '0,
input wire logic [CNT-1:0] tx_lfc_resend = '0,
input wire logic [CNT-1:0] rx_lfc_en = '0,
output wire logic [CNT-1:0] rx_lfc_req,
input wire logic [CNT-1:0] rx_lfc_ack = '0,
input wire logic tx_lfc_req[CNT] = '{CNT{1'b0}},
input wire logic tx_lfc_resend[CNT] = '{CNT{1'b0}},
input wire logic rx_lfc_en[CNT] = '{CNT{1'b0}},
output wire logic rx_lfc_req[CNT],
input wire logic rx_lfc_ack[CNT] = '{CNT{1'b0}},
/*
* Priority Flow Control (PFC) (IEEE 802.3 annex 31D PFC)
*/
input wire logic [7:0] tx_pfc_req[CNT] = '{CNT{'0}},
input wire logic [CNT-1:0] tx_pfc_resend = '0,
input wire logic tx_pfc_resend[CNT] = '{CNT{1'b0}},
input wire logic [7:0] rx_pfc_en[CNT] = '{CNT{'0}},
output wire logic [7:0] rx_pfc_req[CNT],
input wire logic [7:0] rx_pfc_ack[CNT] = '{CNT{'0}},
@@ -157,9 +158,9 @@ module taxi_eth_mac_25g_us #
/*
* Pause interface
*/
input wire logic [CNT-1:0] tx_lfc_pause_en = '0,
input wire logic [CNT-1:0] tx_pause_req = '0,
output wire logic [CNT-1:0] tx_pause_ack,
input wire logic tx_lfc_pause_en[CNT] = '{CNT{1'b0}},
input wire logic tx_pause_req[CNT] = '{CNT{1'b0}},
output wire logic tx_pause_ack[CNT],
/*
* Statistics
@@ -174,51 +175,51 @@ module taxi_eth_mac_25g_us #
output wire logic [1:0] tx_start_packet[CNT],
output wire logic [3:0] stat_tx_byte[CNT],
output wire logic [15:0] stat_tx_pkt_len[CNT],
output wire logic [CNT-1:0] stat_tx_pkt_ucast,
output wire logic [CNT-1:0] stat_tx_pkt_mcast,
output wire logic [CNT-1:0] stat_tx_pkt_bcast,
output wire logic [CNT-1:0] stat_tx_pkt_vlan,
output wire logic [CNT-1:0] stat_tx_pkt_good,
output wire logic [CNT-1:0] stat_tx_pkt_bad,
output wire logic [CNT-1:0] stat_tx_err_oversize,
output wire logic [CNT-1:0] stat_tx_err_user,
output wire logic [CNT-1:0] stat_tx_err_underflow,
output wire logic stat_tx_pkt_ucast[CNT],
output wire logic stat_tx_pkt_mcast[CNT],
output wire logic stat_tx_pkt_bcast[CNT],
output wire logic stat_tx_pkt_vlan[CNT],
output wire logic stat_tx_pkt_good[CNT],
output wire logic stat_tx_pkt_bad[CNT],
output wire logic stat_tx_err_oversize[CNT],
output wire logic stat_tx_err_user[CNT],
output wire logic stat_tx_err_underflow[CNT],
output wire logic [1:0] rx_start_packet[CNT],
output wire logic [6:0] rx_error_count[CNT],
output wire logic [CNT-1:0] rx_block_lock,
output wire logic [CNT-1:0] rx_high_ber,
output wire logic [CNT-1:0] rx_status,
output wire logic rx_block_lock[CNT],
output wire logic rx_high_ber[CNT],
output wire logic rx_status[CNT],
output wire logic [3:0] stat_rx_byte[CNT],
output wire logic [15:0] stat_rx_pkt_len[CNT],
output wire logic [CNT-1:0] stat_rx_pkt_fragment,
output wire logic [CNT-1:0] stat_rx_pkt_jabber,
output wire logic [CNT-1:0] stat_rx_pkt_ucast,
output wire logic [CNT-1:0] stat_rx_pkt_mcast,
output wire logic [CNT-1:0] stat_rx_pkt_bcast,
output wire logic [CNT-1:0] stat_rx_pkt_vlan,
output wire logic [CNT-1:0] stat_rx_pkt_good,
output wire logic [CNT-1:0] stat_rx_pkt_bad,
output wire logic [CNT-1:0] stat_rx_err_oversize,
output wire logic [CNT-1:0] stat_rx_err_bad_fcs,
output wire logic [CNT-1:0] stat_rx_err_bad_block,
output wire logic [CNT-1:0] stat_rx_err_framing,
output wire logic [CNT-1:0] stat_rx_err_preamble,
input wire logic [CNT-1:0] stat_rx_fifo_drop = '0,
output wire logic [CNT-1:0] stat_tx_mcf,
output wire logic [CNT-1:0] stat_rx_mcf,
output wire logic [CNT-1:0] stat_tx_lfc_pkt,
output wire logic [CNT-1:0] stat_tx_lfc_xon,
output wire logic [CNT-1:0] stat_tx_lfc_xoff,
output wire logic [CNT-1:0] stat_tx_lfc_paused,
output wire logic [CNT-1:0] stat_tx_pfc_pkt,
output wire logic stat_rx_pkt_fragment[CNT],
output wire logic stat_rx_pkt_jabber[CNT],
output wire logic stat_rx_pkt_ucast[CNT],
output wire logic stat_rx_pkt_mcast[CNT],
output wire logic stat_rx_pkt_bcast[CNT],
output wire logic stat_rx_pkt_vlan[CNT],
output wire logic stat_rx_pkt_good[CNT],
output wire logic stat_rx_pkt_bad[CNT],
output wire logic stat_rx_err_oversize[CNT],
output wire logic stat_rx_err_bad_fcs[CNT],
output wire logic stat_rx_err_bad_block[CNT],
output wire logic stat_rx_err_framing[CNT],
output wire logic stat_rx_err_preamble[CNT],
input wire logic stat_rx_fifo_drop[CNT] = '{CNT{1'b0}},
output wire logic stat_tx_mcf[CNT],
output wire logic stat_rx_mcf[CNT],
output wire logic stat_tx_lfc_pkt[CNT],
output wire logic stat_tx_lfc_xon[CNT],
output wire logic stat_tx_lfc_xoff[CNT],
output wire logic stat_tx_lfc_paused[CNT],
output wire logic stat_tx_pfc_pkt[CNT],
output wire logic [7:0] stat_tx_pfc_xon[CNT],
output wire logic [7:0] stat_tx_pfc_xoff[CNT],
output wire logic [7:0] stat_tx_pfc_paused[CNT],
output wire logic [CNT-1:0] stat_rx_lfc_pkt,
output wire logic [CNT-1:0] stat_rx_lfc_xon,
output wire logic [CNT-1:0] stat_rx_lfc_xoff,
output wire logic [CNT-1:0] stat_rx_lfc_paused,
output wire logic [CNT-1:0] stat_rx_pfc_pkt,
output wire logic stat_rx_lfc_pkt[CNT],
output wire logic stat_rx_lfc_xon[CNT],
output wire logic stat_rx_lfc_xoff[CNT],
output wire logic stat_rx_lfc_paused[CNT],
output wire logic stat_rx_pfc_pkt[CNT],
output wire logic [7:0] stat_rx_pfc_xon[CNT],
output wire logic [7:0] stat_rx_pfc_xoff[CNT],
output wire logic [7:0] stat_rx_pfc_paused[CNT],
@@ -228,43 +229,43 @@ module taxi_eth_mac_25g_us #
*/
input wire logic [15:0] cfg_tx_max_pkt_len[CNT] = '{CNT{16'd1518}},
input wire logic [7:0] cfg_tx_ifg[CNT] = '{CNT{8'd12}},
input wire logic [CNT-1:0] cfg_tx_enable = '1,
input wire logic cfg_tx_enable[CNT] = '{CNT{1'b1}},
input wire logic [15:0] cfg_rx_max_pkt_len[CNT] = '{CNT{16'd1518}},
input wire logic [CNT-1:0] cfg_rx_enable = '1,
input wire logic cfg_rx_enable[CNT] = '{CNT{1'b1}},
input wire logic [7:0] cfg_ifg[CNT] = '{CNT{8'd12}},
input wire logic [CNT-1:0] cfg_tx_prbs31_enable = '0,
input wire logic [CNT-1:0] cfg_rx_prbs31_enable = '0,
input wire logic cfg_tx_prbs31_enable[CNT] = '{CNT{1'b0}},
input wire logic cfg_rx_prbs31_enable[CNT] = '{CNT{1'b0}},
input wire logic [47:0] cfg_mcf_rx_eth_dst_mcast[CNT] = '{CNT{48'h01_80_C2_00_00_01}},
input wire logic [CNT-1:0] cfg_mcf_rx_check_eth_dst_mcast = '1,
input wire logic cfg_mcf_rx_check_eth_dst_mcast[CNT] = '{CNT{1'b1}},
input wire logic [47:0] cfg_mcf_rx_eth_dst_ucast[CNT] = '{CNT{48'd0}},
input wire logic [CNT-1:0] cfg_mcf_rx_check_eth_dst_ucast = '0,
input wire logic cfg_mcf_rx_check_eth_dst_ucast[CNT] = '{CNT{1'b0}},
input wire logic [47:0] cfg_mcf_rx_eth_src[CNT] = '{CNT{48'd0}},
input wire logic [CNT-1:0] cfg_mcf_rx_check_eth_src = '0,
input wire logic cfg_mcf_rx_check_eth_src[CNT] = '{CNT{1'b0}},
input wire logic [15:0] cfg_mcf_rx_eth_type[CNT] = '{CNT{16'h8808}},
input wire logic [15:0] cfg_mcf_rx_opcode_lfc[CNT] = '{CNT{16'h0001}},
input wire logic [CNT-1:0] cfg_mcf_rx_check_opcode_lfc = '1,
input wire logic cfg_mcf_rx_check_opcode_lfc[CNT] = '{CNT{1'b1}},
input wire logic [15:0] cfg_mcf_rx_opcode_pfc[CNT] = '{CNT{16'h0101}},
input wire logic [CNT-1:0] cfg_mcf_rx_check_opcode_pfc = '1,
input wire logic [CNT-1:0] cfg_mcf_rx_forward = '0,
input wire logic [CNT-1:0] cfg_mcf_rx_enable = '0,
input wire logic cfg_mcf_rx_check_opcode_pfc[CNT] = '{CNT{1'b1}},
input wire logic cfg_mcf_rx_forward[CNT] = '{CNT{1'b0}},
input wire logic cfg_mcf_rx_enable[CNT] = '{CNT{1'b0}},
input wire logic [47:0] cfg_tx_lfc_eth_dst[CNT] = '{CNT{48'h01_80_C2_00_00_01}},
input wire logic [47:0] cfg_tx_lfc_eth_src[CNT] = '{CNT{48'h80_23_31_43_54_4C}},
input wire logic [15:0] cfg_tx_lfc_eth_type[CNT] = '{CNT{16'h8808}},
input wire logic [15:0] cfg_tx_lfc_opcode[CNT] = '{CNT{16'h0001}},
input wire logic [CNT-1:0] cfg_tx_lfc_en = '0,
input wire logic cfg_tx_lfc_en[CNT] = '{CNT{1'b0}},
input wire logic [15:0] cfg_tx_lfc_quanta[CNT] = '{CNT{16'hffff}},
input wire logic [15:0] cfg_tx_lfc_refresh[CNT] = '{CNT{16'h7fff}},
input wire logic [47:0] cfg_tx_pfc_eth_dst[CNT] = '{CNT{48'h01_80_C2_00_00_01}},
input wire logic [47:0] cfg_tx_pfc_eth_src[CNT] = '{CNT{48'h80_23_31_43_54_4C}},
input wire logic [15:0] cfg_tx_pfc_eth_type[CNT] = '{CNT{16'h8808}},
input wire logic [15:0] cfg_tx_pfc_opcode[CNT] = '{CNT{16'h0101}},
input wire logic [CNT-1:0] cfg_tx_pfc_en = '0,
input wire logic cfg_tx_pfc_en[CNT] = '{CNT{1'b0}},
input wire logic [15:0] cfg_tx_pfc_quanta[CNT][8] = '{CNT{'{8{16'hffff}}}},
input wire logic [15:0] cfg_tx_pfc_refresh[CNT][8] = '{CNT{'{8{16'h7fff}}}},
input wire logic [15:0] cfg_rx_lfc_opcode[CNT] = '{CNT{16'h0001}},
input wire logic [CNT-1:0] cfg_rx_lfc_en = '0,
input wire logic cfg_rx_lfc_en[CNT] = '{CNT{1'b0}},
input wire logic [15:0] cfg_rx_pfc_opcode[CNT] = '{CNT{16'h0101}},
input wire logic [CNT-1:0] cfg_rx_pfc_en = '0
input wire logic cfg_rx_pfc_en[CNT] = '{CNT{1'b0}}
);
// statistics