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eth: Clean up testbench parameters

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-02-11 22:35:18 -08:00
parent 04b73e7ddf
commit 8a67eaa220
16 changed files with 10 additions and 24 deletions
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1
tb/eth/taxi_axis_xgmii_rx_32/Makefile
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@@ -31,7 +31,6 @@ VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W := 32
export PARAM_CTRL_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_PTP_TS_EN := 1
export PARAM_PTP_TS_W := 96

1
tb/eth/taxi_axis_xgmii_rx_32/test_taxi_axis_xgmii_rx_32.py
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@@ -150,7 +150,6 @@ def test_taxi_axis_xgmii_rx_32(request):
parameters = {}
parameters['DATA_W'] = 32
parameters['CTRL_W'] = parameters['DATA_W'] // 8
parameters['PTP_TS_EN'] = 1
parameters['PTP_TS_W'] = 96

2
tb/eth/taxi_axis_xgmii_rx_32/test_taxi_axis_xgmii_rx_32.sv
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@@ -19,13 +19,13 @@ module test_taxi_axis_xgmii_rx_32 #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 32,
parameter CTRL_W = (DATA_W/8),
parameter logic PTP_TS_EN = 1'b0,
parameter PTP_TS_W = 96
/* verilator lint_on WIDTHTRUNC */
)
();
localparam CTRL_W = DATA_W/8;
localparam USER_W = (PTP_TS_EN ? PTP_TS_W : 0) + 1;
logic clk;

1
tb/eth/taxi_axis_xgmii_rx_64/Makefile
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@@ -31,7 +31,6 @@ VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W := 64
export PARAM_CTRL_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_PTP_TS_EN := 1
export PARAM_PTP_TS_FMT_TOD := 1
export PARAM_PTP_TS_W := $(if $(filter-out 1,$(PARAM_PTP_TS_FMT_TOD)),64,96)

1
tb/eth/taxi_axis_xgmii_rx_64/test_taxi_axis_xgmii_rx_64.py
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@@ -154,7 +154,6 @@ def test_taxi_axis_xgmii_rx_64(request):
parameters = {}
parameters['DATA_W'] = 64
parameters['CTRL_W'] = parameters['DATA_W'] // 8
parameters['PTP_TS_EN'] = 1
parameters['PTP_TS_FMT_TOD'] = 1
parameters['PTP_TS_W'] = 96 if parameters['PTP_TS_FMT_TOD'] else 64

2
tb/eth/taxi_axis_xgmii_rx_64/test_taxi_axis_xgmii_rx_64.sv
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@@ -19,7 +19,6 @@ module test_taxi_axis_xgmii_rx_64 #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 64,
parameter CTRL_W = (DATA_W/8),
parameter logic PTP_TS_EN = 1'b0,
parameter logic PTP_TS_FMT_TOD = 1'b1,
parameter PTP_TS_W = PTP_TS_FMT_TOD ? 96 : 64
@@ -27,6 +26,7 @@ module test_taxi_axis_xgmii_rx_64 #
)
();
localparam CTRL_W = DATA_W/8;
localparam USER_W = (PTP_TS_EN ? PTP_TS_W : 0) + 1;
logic clk;

1
tb/eth/taxi_axis_xgmii_tx_32/Makefile
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@@ -31,7 +31,6 @@ VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W := 32
export PARAM_CTRL_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_PADDING_EN := 1
export PARAM_DIC_EN := 1
export PARAM_MIN_FRAME_LEN := 64

1
tb/eth/taxi_axis_xgmii_tx_32/test_taxi_axis_xgmii_tx_32.py
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@@ -321,7 +321,6 @@ def test_taxi_axis_xgmii_tx_32(request, dic_en):
parameters = {}
parameters['DATA_W'] = 32
parameters['CTRL_W'] = parameters['DATA_W'] // 8
parameters['PADDING_EN'] = 1
parameters['DIC_EN'] = dic_en
parameters['MIN_FRAME_LEN'] = 64

2
tb/eth/taxi_axis_xgmii_tx_32/test_taxi_axis_xgmii_tx_32.sv
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@@ -19,7 +19,6 @@ module test_taxi_axis_xgmii_tx_32 #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 32,
parameter CTRL_W = (DATA_W/8),
parameter logic PADDING_EN = 1'b1,
parameter logic DIC_EN = 1'b1,
parameter MIN_FRAME_LEN = 64,
@@ -31,6 +30,7 @@ module test_taxi_axis_xgmii_tx_32 #
)
();
localparam CTRL_W = DATA_W/8;
localparam USER_W = TX_CPL_CTRL_IN_TUSER ? 2 : 1;
logic clk;

1
tb/eth/taxi_axis_xgmii_tx_64/Makefile
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@@ -31,7 +31,6 @@ VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W := 64
export PARAM_CTRL_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_PADDING_EN := 1
export PARAM_DIC_EN := 1
export PARAM_MIN_FRAME_LEN := 64

1
tb/eth/taxi_axis_xgmii_tx_64/test_taxi_axis_xgmii_tx_64.py
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@@ -329,7 +329,6 @@ def test_taxi_axis_xgmii_tx_64(request, enable_dic):
parameters = {}
parameters['DATA_W'] = 64
parameters['CTRL_W'] = parameters['DATA_W'] // 8
parameters['PADDING_EN'] = 1
parameters['DIC_EN'] = enable_dic
parameters['MIN_FRAME_LEN'] = 64

2
tb/eth/taxi_axis_xgmii_tx_64/test_taxi_axis_xgmii_tx_64.sv
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@@ -19,7 +19,6 @@ module test_taxi_axis_xgmii_tx_64 #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 64,
parameter CTRL_W = (DATA_W/8),
parameter logic PADDING_EN = 1'b1,
parameter logic DIC_EN = 1'b1,
parameter MIN_FRAME_LEN = 64,
@@ -32,6 +31,7 @@ module test_taxi_axis_xgmii_tx_64 #
)
();
localparam CTRL_W = DATA_W/8;
localparam USER_W = TX_CPL_CTRL_IN_TUSER ? 2 : 1;
logic clk;

2
tb/eth/taxi_eth_mac_10g/Makefile
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@@ -29,8 +29,6 @@ VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W := 64
export PARAM_KEEP_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_CTRL_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_PADDING_EN := 1
export PARAM_DIC_EN := 1
export PARAM_MIN_FRAME_LEN := 64

2
tb/eth/taxi_eth_mac_10g/test_taxi_eth_mac_10g.py
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@@ -724,8 +724,6 @@ def test_taxi_eth_mac_10g(request, data_w, dic_en, pfc_en):
parameters = {}
parameters['DATA_W'] = data_w
parameters['KEEP_W'] = parameters['DATA_W'] // 8
parameters['CTRL_W'] = parameters['DATA_W'] // 8
parameters['PADDING_EN'] = 1
parameters['DIC_EN'] = dic_en
parameters['MIN_FRAME_LEN'] = 64

7
tb/eth/taxi_eth_mac_10g/test_taxi_eth_mac_10g.sv
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@@ -19,8 +19,6 @@ module test_taxi_eth_mac_10g #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 64,
parameter KEEP_W = (DATA_W/8),
parameter CTRL_W = (DATA_W/8),
parameter logic PADDING_EN = 1'b1,
parameter logic DIC_EN = 1'b1,
parameter MIN_FRAME_LEN = 64,
@@ -34,6 +32,7 @@ module test_taxi_eth_mac_10g #
)
();
localparam CTRL_W = (DATA_W/8);
localparam TX_USER_W = 1;
localparam RX_USER_W = (PTP_TS_EN ? PTP_TS_W : 0) + 1;
@@ -42,9 +41,9 @@ logic rx_rst;
logic tx_clk;
logic tx_rst;
taxi_axis_if #(.DATA_W(DATA_W), .KEEP_W(KEEP_W), .USER_EN(1), .USER_W(TX_USER_W), .ID_EN(1), .ID_W(TX_TAG_W)) s_axis_tx();
taxi_axis_if #(.DATA_W(DATA_W), .USER_EN(1), .USER_W(TX_USER_W), .ID_EN(1), .ID_W(TX_TAG_W)) s_axis_tx();
taxi_axis_if #(.DATA_W(PTP_TS_W), .KEEP_W(1), .ID_EN(1), .ID_W(TX_TAG_W)) m_axis_tx_cpl();
taxi_axis_if #(.DATA_W(DATA_W), .KEEP_W(KEEP_W), .USER_EN(1), .USER_W(RX_USER_W)) m_axis_rx();
taxi_axis_if #(.DATA_W(DATA_W), .USER_EN(1), .USER_W(RX_USER_W)) m_axis_rx();
logic [DATA_W-1:0] xgmii_rxd;
logic [CTRL_W-1:0] xgmii_rxc;

7
tb/eth/taxi_eth_mac_phy_10g/test_taxi_eth_mac_phy_10g.sv
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@@ -19,8 +19,7 @@ module test_taxi_eth_mac_phy_10g #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 64,
parameter KEEP_W = (DATA_W/8),
parameter HDR_W = (DATA_W/32),
parameter HDR_W = 2,
parameter logic PADDING_EN = 1'b1,
parameter logic DIC_EN = 1'b1,
parameter MIN_FRAME_LEN = 64,
@@ -50,9 +49,9 @@ logic rx_rst;
logic tx_clk;
logic tx_rst;
taxi_axis_if #(.DATA_W(DATA_W), .KEEP_W(KEEP_W), .USER_EN(1), .USER_W(TX_USER_W), .ID_EN(1), .ID_W(TX_TAG_W)) s_axis_tx();
taxi_axis_if #(.DATA_W(DATA_W), .USER_EN(1), .USER_W(TX_USER_W), .ID_EN(1), .ID_W(TX_TAG_W)) s_axis_tx();
taxi_axis_if #(.DATA_W(PTP_TS_W), .KEEP_W(1), .ID_EN(1), .ID_W(TX_TAG_W)) m_axis_tx_cpl();
taxi_axis_if #(.DATA_W(DATA_W), .KEEP_W(KEEP_W), .USER_EN(1), .USER_W(RX_USER_W)) m_axis_rx();
taxi_axis_if #(.DATA_W(DATA_W), .USER_EN(1), .USER_W(RX_USER_W)) m_axis_rx();
logic [DATA_W-1:0] serdes_tx_data;
logic [HDR_W-1:0] serdes_tx_hdr;