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eth: Clean up testbench parameters

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-02-11 22:35:18 -08:00
parent 04b73e7ddf
commit 8a67eaa220
16 changed files with 10 additions and 24 deletions
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1
tb/eth/taxi_axis_xgmii_tx_64/Makefile
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@@ -31,7 +31,6 @@ VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W := 64
export PARAM_CTRL_W := $(shell expr $(PARAM_DATA_W) / 8 )
export PARAM_PADDING_EN := 1
export PARAM_DIC_EN := 1
export PARAM_MIN_FRAME_LEN := 64

1
tb/eth/taxi_axis_xgmii_tx_64/test_taxi_axis_xgmii_tx_64.py
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@@ -329,7 +329,6 @@ def test_taxi_axis_xgmii_tx_64(request, enable_dic):
parameters = {}
parameters['DATA_W'] = 64
parameters['CTRL_W'] = parameters['DATA_W'] // 8
parameters['PADDING_EN'] = 1
parameters['DIC_EN'] = enable_dic
parameters['MIN_FRAME_LEN'] = 64

2
tb/eth/taxi_axis_xgmii_tx_64/test_taxi_axis_xgmii_tx_64.sv
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@@ -19,7 +19,6 @@ module test_taxi_axis_xgmii_tx_64 #
(
/* verilator lint_off WIDTHTRUNC */
parameter DATA_W = 64,
parameter CTRL_W = (DATA_W/8),
parameter logic PADDING_EN = 1'b1,
parameter logic DIC_EN = 1'b1,
parameter MIN_FRAME_LEN = 64,
@@ -32,6 +31,7 @@ module test_taxi_axis_xgmii_tx_64 #
)
();
localparam CTRL_W = DATA_W/8;
localparam USER_W = TX_CPL_CTRL_IN_TUSER ? 2 : 1;
logic clk;