sync: Add reset synchronizer module

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-02-03 23:42:47 -08:00
parent e23627c92f
commit 9cc4cbc670
2 changed files with 65 additions and 0 deletions

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# SPDX-License-Identifier: CERN-OHL-S-2.0
#
# Copyright (c) 2020-2025 FPGA Ninja, LLC
#
# Authors:
# - Alex Forencich
#
# reset synchronizer timing constraints
foreach inst [get_cells -hier -filter {(ORIG_REF_NAME == taxi_sync_reset || REF_NAME == taxi_sync_reset)}] {
puts "Inserting timing constraints for taxi_sync_reset instance $inst"
# reset synchronization
set reset_ffs [get_cells -quiet -hier -regexp ".*/sync_reg_reg\\\[\\d+\\\]" -filter "PARENT == $inst"]
set_property ASYNC_REG TRUE $reset_ffs
set_false_path -to [get_pins -of_objects $reset_ffs -filter {IS_PRESET || IS_RESET}]
}