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lss: Extract UART data width setting from interface

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-02-26 14:15:42 -08:00
parent 07d75f231a
commit c6cbb57fe7
4 changed files with 8 additions and 27 deletions
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9
rtl/lss/taxi_uart_tx.sv
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@@ -15,10 +15,7 @@ Authors:
/*
* AXI4-Stream UART (TX)
*/
module taxi_uart_tx #
(
parameter DATA_W = 8
)
module taxi_uart_tx
(
input wire logic clk,
input wire logic rst,
@@ -44,9 +41,7 @@ module taxi_uart_tx #
input wire logic [15:0] prescale
);
// check configuration
if (s_axis_tx.DATA_W != DATA_W)
$fatal(0, "Error: Interface parameter DATA_W mismatch (instance %m)");
localparam DATA_W = s_axis_tx.DATA_W;
logic s_axis_tready_reg = 0;