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example: Add example design for HTG-9200
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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@@ -130,6 +130,7 @@ Example designs are provided for several different FPGA boards, showcasing many
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* Cisco Nexus K3P-Q/ExaNIC X100 (Xilinx Kintex UltraScale+ XCKU3P)
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* Digilent Arty A7 (Xilinx Artix 7 XC7A35T)
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* HiTech Global HTG-940 (Xilinx Virtex UltraScale+ XCVU9P/XCVU13P)
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* HiTech Global HTG-9200 (Xilinx Virtex UltraScale+ XCVU9P/XCVU13P)
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* Silicom fb2CG@KU15P (Xilinx Kintex UltraScale+ XCKU15P)
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* Xilinx Alveo U45N/SN1000 (Xilinx Virtex UltraScale+ XCU26)
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* Xilinx Alveo U50 (Xilinx Virtex UltraScale+ XCU50)
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