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example/Arty: Add XFCP to Arty example design for monitoring and control

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-04-09 12:17:46 -07:00
parent abadd72b1d
commit ddf1b37f4e
5 changed files with 80 additions and 53 deletions
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example/Arty/fpga/fpga/Makefile
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@@ -15,7 +15,9 @@ FPGA_ARCH = artix7
SYN_FILES = ../rtl/fpga.sv
SYN_FILES += ../rtl/fpga_core.sv
SYN_FILES += ../lib/taxi/rtl/eth/taxi_eth_mac_mii_fifo.f
SYN_FILES += ../lib/taxi/rtl/lss/taxi_uart.f
SYN_FILES += ../lib/taxi/rtl/xfcp/taxi_xfcp_if_uart.f
SYN_FILES += ../lib/taxi/rtl/xfcp/taxi_xfcp_switch.sv
SYN_FILES += ../lib/taxi/rtl/xfcp/taxi_xfcp_mod_stats.f
SYN_FILES += ../lib/taxi/rtl/sync/taxi_sync_reset.sv
SYN_FILES += ../lib/taxi/rtl/sync/taxi_sync_signal.sv
SYN_FILES += ../lib/taxi/rtl/io/taxi_debounce_switch.sv