mirror of
https://github.com/fpganinja/taxi.git
synced 2025-12-09 17:08:38 -08:00
eth: Add MAC statistics module to 1G MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -35,6 +35,11 @@ export PARAM_AXIS_DATA_W := 8
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export PARAM_PADDING_EN := 1
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export PARAM_MIN_FRAME_LEN := 64
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export PARAM_TX_TAG_W := 16
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export PARAM_STAT_EN := 1
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export PARAM_STAT_TX_LEVEL := 2
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export PARAM_STAT_RX_LEVEL := $(PARAM_STAT_TX_LEVEL)
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export PARAM_STAT_ID_BASE := 0
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export PARAM_STAT_UPDATE_PERIOD := 1024
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export PARAM_TX_FIFO_DEPTH := 16384
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export PARAM_TX_FIFO_RAM_PIPELINE := 1
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export PARAM_TX_FRAME_FIFO := 1
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@@ -33,6 +33,7 @@ class TB:
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cocotb.start_soon(Clock(dut.gtx_clk, 8, units="ns").start())
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cocotb.start_soon(Clock(dut.logic_clk, 8, units="ns").start())
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cocotb.start_soon(Clock(dut.stat_clk, 8, units="ns").start())
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self.gmii_phy = GmiiPhy(dut.gmii_txd, dut.gmii_tx_er, dut.gmii_tx_en, dut.mii_tx_clk, dut.gmii_tx_clk,
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dut.gmii_rxd, dut.gmii_rx_er, dut.gmii_rx_dv, dut.gmii_rx_clk, speed=speed)
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@@ -41,21 +42,28 @@ class TB:
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self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.logic_clk, dut.logic_rst)
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self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_rx), dut.logic_clk, dut.logic_rst)
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dut.cfg_ifg.setimmediatevalue(0)
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self.stat_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_stat), dut.stat_clk, dut.stat_rst)
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dut.cfg_tx_max_pkt_len.setimmediatevalue(0)
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dut.cfg_tx_ifg.setimmediatevalue(0)
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dut.cfg_tx_enable.setimmediatevalue(0)
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dut.cfg_rx_max_pkt_len.setimmediatevalue(0)
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dut.cfg_rx_enable.setimmediatevalue(0)
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async def reset(self):
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self.dut.gtx_rst.setimmediatevalue(0)
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self.dut.logic_rst.setimmediatevalue(0)
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self.dut.stat_rst.setimmediatevalue(0)
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await RisingEdge(self.dut.gtx_clk)
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await RisingEdge(self.dut.gtx_clk)
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self.dut.gtx_rst.value = 1
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self.dut.logic_rst.value = 1
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self.dut.stat_rst.value = 1
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await RisingEdge(self.dut.gtx_clk)
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await RisingEdge(self.dut.gtx_clk)
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self.dut.gtx_rst.value = 0
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self.dut.logic_rst.value = 0
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self.dut.stat_rst.value = 0
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await RisingEdge(self.dut.gtx_clk)
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await RisingEdge(self.dut.gtx_clk)
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@@ -65,7 +73,8 @@ async def run_test_rx(dut, payload_lengths=None, payload_data=None, ifg=12, spee
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tb = TB(dut, speed)
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tb.gmii_phy.rx.ifg = ifg
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tb.dut.cfg_ifg.value = ifg
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tb.dut.cfg_tx_ifg.value = ifg
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tb.dut.cfg_rx_max_pkt_len.value = 9218
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tb.dut.cfg_rx_enable.value = 1
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await tb.reset()
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@@ -103,7 +112,8 @@ async def run_test_tx(dut, payload_lengths=None, payload_data=None, ifg=12, spee
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tb = TB(dut, speed)
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tb.gmii_phy.rx.ifg = ifg
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tb.dut.cfg_ifg.value = ifg
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tb.dut.cfg_tx_max_pkt_len.value = 9218
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tb.dut.cfg_tx_ifg.value = ifg
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tb.dut.cfg_tx_enable.value = 1
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await tb.reset()
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@@ -200,6 +210,11 @@ def test_taxi_eth_mac_1g_gmii_fifo(request):
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parameters['PADDING_EN'] = 1
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parameters['MIN_FRAME_LEN'] = 64
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parameters['TX_TAG_W'] = 16
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parameters['STAT_EN'] = 1
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parameters['STAT_TX_LEVEL'] = 2
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parameters['STAT_RX_LEVEL'] = parameters['STAT_TX_LEVEL']
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parameters['STAT_ID_BASE'] = 0
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parameters['STAT_UPDATE_PERIOD'] = 1024
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parameters['TX_FIFO_DEPTH'] = 16384
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parameters['TX_FIFO_RAM_PIPELINE'] = 1
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parameters['TX_FRAME_FIFO'] = 1
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@@ -25,6 +25,11 @@ module test_taxi_eth_mac_1g_gmii_fifo #
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parameter logic PADDING_EN = 1'b1,
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parameter MIN_FRAME_LEN = 64,
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parameter TX_TAG_W = 16,
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parameter logic STAT_EN = 1'b0,
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parameter STAT_TX_LEVEL = 1,
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parameter STAT_RX_LEVEL = STAT_TX_LEVEL,
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parameter STAT_ID_BASE = 0,
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parameter STAT_UPDATE_PERIOD = 1024,
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parameter TX_FIFO_DEPTH = 4096,
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parameter TX_FIFO_RAM_PIPELINE = 1,
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parameter logic TX_FRAME_FIFO = 1'b1,
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@@ -65,6 +70,10 @@ logic [7:0] gmii_txd;
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logic gmii_tx_en;
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logic gmii_tx_er;
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logic stat_clk;
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logic stat_rst;
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taxi_axis_if #(.DATA_W(16), .KEEP_W(1), .KEEP_EN(0), .LAST_EN(0), .USER_EN(1), .USER_W(1), .ID_EN(1), .ID_W(8)) m_axis_stat();
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logic tx_error_underflow;
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logic tx_fifo_overflow;
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logic tx_fifo_bad_frame;
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@@ -76,8 +85,10 @@ logic rx_fifo_bad_frame;
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logic rx_fifo_good_frame;
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logic [1:0] link_speed;
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logic [7:0] cfg_ifg;
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logic [15:0] cfg_tx_max_pkt_len;
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logic [7:0] cfg_tx_ifg;
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logic cfg_tx_enable;
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logic [15:0] cfg_rx_max_pkt_len;
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logic cfg_rx_enable;
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taxi_eth_mac_1g_gmii_fifo #(
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@@ -86,6 +97,11 @@ taxi_eth_mac_1g_gmii_fifo #(
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.FAMILY(FAMILY),
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.PADDING_EN(PADDING_EN),
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.MIN_FRAME_LEN(MIN_FRAME_LEN),
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.STAT_EN(STAT_EN),
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.STAT_TX_LEVEL(STAT_TX_LEVEL),
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.STAT_RX_LEVEL(STAT_RX_LEVEL),
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.STAT_ID_BASE(STAT_ID_BASE),
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.STAT_UPDATE_PERIOD(STAT_UPDATE_PERIOD),
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.TX_FIFO_DEPTH(TX_FIFO_DEPTH),
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.TX_FIFO_RAM_PIPELINE(TX_FIFO_RAM_PIPELINE),
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.TX_FRAME_FIFO(TX_FRAME_FIFO),
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@@ -130,6 +146,13 @@ uut (
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.gmii_tx_en(gmii_tx_en),
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.gmii_tx_er(gmii_tx_er),
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/*
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* Statistics
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*/
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.stat_clk(stat_clk),
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.stat_rst(stat_rst),
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.m_axis_stat(m_axis_stat),
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/*
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* Status
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*/
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@@ -147,8 +170,10 @@ uut (
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/*
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* Configuration
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*/
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.cfg_ifg(cfg_ifg),
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.cfg_tx_max_pkt_len(cfg_tx_max_pkt_len),
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.cfg_tx_ifg(cfg_tx_ifg),
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.cfg_tx_enable(cfg_tx_enable),
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.cfg_rx_max_pkt_len(cfg_rx_max_pkt_len),
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.cfg_rx_enable(cfg_rx_enable)
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);
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