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cndm: Implement command status codes and error handling

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-03-17 17:41:08 -07:00
parent 5e63669ba1
commit f69e6a8c12
9 changed files with 230 additions and 66 deletions
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2
src/cndm/modules/cndm/cndm.h
View File

@@ -258,7 +258,7 @@ extern const struct ethtool_ops cndm_ethtool_ops;
// cndm_ptp.c
ktime_t cndm_read_cpl_ts(struct cndm_ring *ring, const struct cndm_cpl *cpl);
void cndm_register_phc(struct cndm_dev *cdev);
int cndm_register_phc(struct cndm_dev *cdev);
void cndm_unregister_phc(struct cndm_dev *cdev);
// cndm_eq.c

32
src/cndm/modules/cndm/cndm_cmd.c
View File

@@ -12,6 +12,8 @@ Authors:
int cndm_exec_mbox_cmd(struct cndm_dev *cdev, void *cmd, void *rsp)
{
bool done = false;
int ret = 0;
int k;
if (!cmd || !rsp)
@@ -31,22 +33,28 @@ int cndm_exec_mbox_cmd(struct cndm_dev *cdev, void *cmd, void *rsp)
iowrite32(0x00000001, cdev->hw_addr + 0x0200);
// wait for completion
for (k = 0; k < 10; k++) {
if ((ioread32(cdev->hw_addr + 0x0200) & 0x00000001) == 0) {
for (k = 0; k < 100; k++) {
done = (ioread32(cdev->hw_addr + 0x0200) & 0x00000001) == 0;
if (done)
break;
}
udelay(100);
}
// read response from mailbox
for (k = 0; k < 16; k++) {
*((u32 *)(rsp + k*4)) = ioread32(cdev->hw_addr + 0x10000 + 0x40 + k*4);
if (done) {
// read response from mailbox
for (k = 0; k < 16; k++) {
*((u32 *)(rsp + k*4)) = ioread32(cdev->hw_addr + 0x10000 + 0x40 + k*4);
}
} else {
dev_err(cdev->dev, "Command timed out");
print_hex_dump(KERN_ERR, "", DUMP_PREFIX_NONE, 16, 1,
cmd, sizeof(struct cndm_cmd_cfg), true);
ret = -ETIMEDOUT;
}
mutex_unlock(&cdev->mbox_lock);
return 0;
return ret;
}
int cndm_exec_cmd(struct cndm_dev *cdev, void *cmd, void *rsp)
@@ -58,6 +66,7 @@ int cndm_access_reg(struct cndm_dev *cdev, u32 reg, int raw, int write, u64 *dat
{
struct cndm_cmd_reg cmd;
struct cndm_cmd_reg rsp;
int ret = 0;
cmd.opcode = CNDM_CMD_OP_ACCESS_REG;
cmd.flags = 0x00000000;
@@ -70,7 +79,12 @@ int cndm_access_reg(struct cndm_dev *cdev, u32 reg, int raw, int write, u64 *dat
if (raw)
cmd.flags |= CNDM_CMD_REG_FLG_RAW;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret)
return ret;
if (rsp.status)
return rsp.status;
if (!write)
*data = rsp.read_val;

10
src/cndm/modules/cndm/cndm_cq.c
View File

@@ -93,11 +93,15 @@ int cndm_open_cq(struct cndm_cq *cq, struct cndm_eq *eq, struct cndm_irq *irq, i
cmd.ptr1 = cq->buf_dma_addr;
cmd.ptr2 = 0;
cndm_exec_cmd(cq->cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cq->cdev, &cmd, &rsp);
if (ret) {
netdev_err(cq->priv->ndev, "Failed to execute command");
goto fail;
}
if (rsp.dboffs == 0) {
if (rsp.status || rsp.dboffs == 0) {
netdev_err(cq->priv->ndev, "Failed to allocate CQ");
ret = -1;
ret = rsp.status;
goto fail;
}

36
src/cndm/modules/cndm/cndm_main.c
View File

@@ -64,7 +64,17 @@ static int cndm_common_probe(struct cndm_dev *cdev)
cmd.flags = 0x00000000;
cmd.cfg_page = 0;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_info(dev, "Failed to execute command");
goto fail;
}
if (rsp.status) {
dev_info(dev, "Command failed");
ret = rsp.status;
goto fail;
}
cdev->cfg_page_max = rsp.cfg_page_max;
cdev->cmd_ver = rsp.cmd_ver;
@@ -110,7 +120,17 @@ static int cndm_common_probe(struct cndm_dev *cdev)
cmd.flags = 0x00000000;
cmd.cfg_page = 1;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_info(dev, "Failed to execute command");
goto fail;
}
if (rsp.status) {
dev_info(dev, "Command failed");
ret = rsp.status;
goto fail;
}
// HW config
cdev->port_count = rsp.p1.port_count;
@@ -142,7 +162,17 @@ static int cndm_common_probe(struct cndm_dev *cdev)
cmd.flags = 0x00000000;
cmd.cfg_page = 2;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_info(dev, "Failed to execute command");
goto fail;
}
if (rsp.status) {
dev_info(dev, "Command failed");
ret = rsp.status;
goto fail;
}
// Resources
cdev->log_max_eq = rsp.p2.log_max_eq;

64
src/cndm/modules/cndm/cndm_ptp.c
View File

@@ -38,6 +38,7 @@ static int cndm_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
struct cndm_dev *cdev = container_of(ptp, struct cndm_dev, ptp_clock_info);
struct cndm_cmd_ptp cmd;
struct cndm_cmd_ptp rsp;
int ret = 0;
bool neg = false;
u64 nom_per_fns, adj;
@@ -65,10 +66,19 @@ static int cndm_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
cmd.flags = CNDM_CMD_PTP_FLG_SET_PERIOD;
cmd.period = adj;
cndm_exec_cmd(cdev, &cmd, &rsp);
dev_dbg(cdev->dev, "%s adj: 0x%llx", __func__, adj);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_err(cdev->dev, "Failed to execute command");
return ret;
}
if (rsp.status) {
dev_err(cdev->dev, "Failed to adjust PHC");
return rsp.status;
}
return 0;
}
@@ -109,13 +119,23 @@ static int cndm_phc_settime(struct ptp_clock_info *ptp, const struct timespec64
struct cndm_dev *cdev = container_of(ptp, struct cndm_dev, ptp_clock_info);
struct cndm_cmd_ptp cmd;
struct cndm_cmd_ptp rsp;
int ret = 0;
cmd.opcode = CNDM_CMD_OP_PTP;
cmd.flags = CNDM_CMD_PTP_FLG_SET_TOD;
cmd.tod_ns = ts->tv_nsec;
cmd.tod_sec = ts->tv_sec;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_err(cdev->dev, "Failed to execute command");
return ret;
}
if (rsp.status) {
dev_err(cdev->dev, "Failed to adjust PHC");
return rsp.status;
}
return 0;
}
@@ -126,6 +146,7 @@ static int cndm_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
struct timespec64 ts;
struct cndm_cmd_ptp cmd;
struct cndm_cmd_ptp rsp;
int ret = 0;
dev_dbg(cdev->dev, "%s: delta: %lld", __func__, delta);
@@ -133,20 +154,29 @@ static int cndm_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
// for a large delta, perform a non-precision step
cndm_phc_gettime(ptp, &ts);
ts = timespec64_add(ts, ns_to_timespec64(delta));
cndm_phc_settime(ptp, &ts);
return cndm_phc_settime(ptp, &ts);
} else {
// for a small delta, perform a precision atomic offset
cmd.opcode = CNDM_CMD_OP_PTP;
cmd.flags = CNDM_CMD_PTP_FLG_OFFSET_TOD;
cmd.tod_ns = delta & 0xffffffff;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_err(cdev->dev, "Failed to execute command");
return ret;
}
if (rsp.status) {
dev_err(cdev->dev, "Failed to adjust PHC");
return rsp.status;
}
}
return 0;
}
static void cndm_phc_set_from_system_clock(struct ptp_clock_info *ptp)
static int cndm_phc_set_from_system_clock(struct ptp_clock_info *ptp)
{
struct timespec64 ts;
@@ -156,28 +186,33 @@ static void cndm_phc_set_from_system_clock(struct ptp_clock_info *ptp)
ts = ktime_to_timespec64(ktime_get_clocktai());
#endif
cndm_phc_settime(ptp, &ts);
return cndm_phc_settime(ptp, &ts);
}
void cndm_register_phc(struct cndm_dev *cdev)
int cndm_register_phc(struct cndm_dev *cdev)
{
struct cndm_cmd_ptp cmd;
struct cndm_cmd_ptp rsp;
int ret = 0;
if (cdev->ptp_clock) {
dev_warn(cdev->dev, "PTP clock already registered");
return;
return 0;
}
cmd.opcode = CNDM_CMD_OP_PTP;
cmd.flags = 0x00000000;
cmd.nom_period = 0;
cndm_exec_cmd(cdev, &cmd, &rsp);
ret = cndm_exec_cmd(cdev, &cmd, &rsp);
if (ret) {
dev_err(cdev->dev, "Failed to execute command");
return ret;
}
if (rsp.nom_period == 0) {
if (rsp.status || rsp.nom_period == 0) {
dev_info(cdev->dev, "PTP clock not present");
return;
return rsp.status;
}
cdev->ptp_nom_period = rsp.nom_period;
@@ -203,13 +238,16 @@ void cndm_register_phc(struct cndm_dev *cdev)
if (IS_ERR(cdev->ptp_clock)) {
dev_err(cdev->dev, "failed to register PHC");
ret = PTR_ERR(cdev->ptp_clock);
cdev->ptp_clock = NULL;
return;
return ret;
}
dev_info(cdev->dev, "registered PHC (index %d)", ptp_clock_index(cdev->ptp_clock));
cndm_phc_set_from_system_clock(&cdev->ptp_clock_info);
return 0;
}
void cndm_unregister_phc(struct cndm_dev *cdev)

10
src/cndm/modules/cndm/cndm_rq.c
View File

@@ -87,11 +87,15 @@ int cndm_open_rq(struct cndm_ring *rq, struct cndm_priv *priv, struct cndm_cq *c
cmd.ptr1 = rq->buf_dma_addr;
cmd.ptr2 = 0;
cndm_exec_cmd(rq->cdev, &cmd, &rsp);
ret = cndm_exec_cmd(rq->cdev, &cmd, &rsp);
if (ret) {
netdev_err(rq->priv->ndev, "Failed to execute command");
goto fail;
}
if (rsp.dboffs == 0) {
if (rsp.status || rsp.dboffs == 0) {
netdev_err(rq->priv->ndev, "Failed to allocate RQ");
ret = -1;
ret = rsp.status;
goto fail;
}

10
src/cndm/modules/cndm/cndm_sq.c
View File

@@ -87,11 +87,15 @@ int cndm_open_sq(struct cndm_ring *sq, struct cndm_priv *priv, struct cndm_cq *c
cmd.ptr1 = sq->buf_dma_addr;
cmd.ptr2 = 0;
cndm_exec_cmd(sq->cdev, &cmd, &rsp);
ret = cndm_exec_cmd(sq->cdev, &cmd, &rsp);
if (ret) {
netdev_err(sq->priv->ndev, "Failed to execute command");
goto fail;
}
if (rsp.dboffs == 0) {
if (rsp.status || rsp.dboffs == 0) {
netdev_err(sq->priv->ndev, "Failed to allocate SQ");
ret = -1;
ret = rsp.status;
goto fail;
}

71
src/cndm/rtl/cndm_brd_ctrl_i2c.sv
View File

@@ -129,11 +129,31 @@ typedef enum logic [15:0] {
CMD_BRD_OP_I2C_RD = 16'h8100,
CMD_BRD_OP_I2C_WR = 16'h8101
} cmd_opcode_t;
} cmd_brd_opcode_t;
typedef enum logic [15:0] {
CMD_STS_OK = 16'h0000,
CMD_STS_EPERM = 16'h0001,
CMD_STS_EIO = 16'h0005,
CMD_STS_ENXIO = 16'h0006,
CMD_STS_EAGAIN = 16'h000B,
CMD_STS_ENOMEM = 16'h000C,
CMD_STS_EACCESS = 16'h000D,
CMD_STS_EFAULT = 16'h000E,
CMD_STS_EBUSY = 16'h0010,
CMD_STS_ENODEV = 16'h0013,
CMD_STS_EINVAL = 16'h0016,
CMD_STS_ENOSPC = 16'h001C,
CMD_STS_EDOM = 16'h0021,
CMD_STS_ERANGE = 16'h0022,
CMD_STS_ENOTSUP = 16'h005F,
CMD_STS_ETIMEDOUT = 16'h006E
} cmd_status_t;
typedef enum logic [4:0] {
STATE_IDLE,
STATE_START,
STATE_OP_DONE,
STATE_I2C_START,
STATE_I2C_SET_MUX,
STATE_I2C_SET_PAGE_1,
@@ -394,7 +414,8 @@ always_comb begin
case (opcode_reg)
CMD_BRD_OP_NOP: begin
// NOP
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -412,10 +433,11 @@ always_comb begin
mode_write_next = 1'b0;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end else begin
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -434,10 +456,11 @@ always_comb begin
mode_write_next = 1'b1;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end else begin
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -456,10 +479,11 @@ always_comb begin
mode_write_next = 1'b0;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end else begin
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -478,10 +502,11 @@ always_comb begin
mode_write_next = 1'b1;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end else begin
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -502,10 +527,11 @@ always_comb begin
mode_write_next = 1'b0;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end else begin
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -527,10 +553,11 @@ always_comb begin
mode_write_next = 1'b0;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end else begin
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -553,7 +580,7 @@ always_comb begin
mode_write_next = 1'b0;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end
CMD_BRD_OP_I2C_WR: begin
@@ -567,12 +594,13 @@ always_comb begin
mode_write_next = 1'b1;
ret_state_next = STATE_SEND_RSP;
ret_state_next = STATE_OP_DONE;
state_next = STATE_I2C_START;
end
default: begin
// unknown opcode
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_EINVAL;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -580,6 +608,15 @@ always_comb begin
end
endcase
end
STATE_OP_DONE: begin
// return status code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
state_next = STATE_SEND_RSP;
end
STATE_I2C_START: begin
mux_idx_next = '0;
dev_sel_next[dev_idx_reg] = 1'b1;

61
src/cndm/rtl/cndm_micro_dp_mgr.sv
View File

@@ -129,6 +129,25 @@ typedef enum logic [15:0] {
CMD_OP_DESTROY_QP = 16'h0243
} cmd_opcode_t;
typedef enum logic [15:0] {
CMD_STS_OK = 16'h0000,
CMD_STS_EPERM = 16'h0001,
CMD_STS_EIO = 16'h0005,
CMD_STS_ENXIO = 16'h0006,
CMD_STS_EAGAIN = 16'h000B,
CMD_STS_ENOMEM = 16'h000C,
CMD_STS_EACCESS = 16'h000D,
CMD_STS_EFAULT = 16'h000E,
CMD_STS_EBUSY = 16'h0010,
CMD_STS_ENODEV = 16'h0013,
CMD_STS_EINVAL = 16'h0016,
CMD_STS_ENOSPC = 16'h001C,
CMD_STS_EDOM = 16'h0021,
CMD_STS_ERANGE = 16'h0022,
CMD_STS_ENOTSUP = 16'h005F,
CMD_STS_ETIMEDOUT = 16'h006E
} cmd_status_t;
typedef enum logic [2:0] {
QTYPE_EQ,
QTYPE_CQ,
@@ -502,7 +521,8 @@ always_comb begin
case (opcode_reg)
CMD_OP_NOP: begin
// NOP
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -536,7 +556,8 @@ always_comb begin
end
end else begin
// PTP not enabled
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -550,7 +571,8 @@ always_comb begin
state_next = STATE_BOARD_CMD;
end else begin
// PTP not enabled
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -572,7 +594,8 @@ always_comb begin
CMD_OP_MODIFY_RQ:
begin
// modify queue operation
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -586,7 +609,8 @@ always_comb begin
CMD_OP_QUERY_RQ:
begin
// query queue operation
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOTSUP;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -604,7 +628,8 @@ always_comb begin
end
default: begin
// unknown opcode
m_axis_rsp_tdata_next = '0; // TODO error code
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_EINVAL;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -628,7 +653,8 @@ always_comb begin
if (cmd_ptr_reg == 15) begin
// done
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -675,7 +701,8 @@ always_comb begin
cmd_ram_wr_en = 1'b1;
if (m_apb_dp_ctrl.pready) begin
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -713,7 +740,8 @@ always_comb begin
host_ptr_next = host_ptr_reg + WQ_REG_STRIDE;
if (cnt_reg == 0) begin
// no more queues
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_ENOMEM;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -862,7 +890,8 @@ always_comb begin
m_apb_dp_ctrl_pwdata_next = dw3_reg;
m_apb_dp_ctrl_pstrb_next = '1;
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -880,7 +909,8 @@ always_comb begin
m_apb_dp_ctrl_pwdata_next = 32'h00000000;
m_apb_dp_ctrl_pstrb_next = '1;
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -916,7 +946,8 @@ always_comb begin
if (cnt_reg == 11) begin
// done
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -1003,7 +1034,8 @@ always_comb begin
if (cnt_reg == 11) begin
// done
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;
@@ -1049,7 +1081,8 @@ always_comb begin
cmd_ptr_next = cmd_ptr_reg + 1;
if (s_axis_brd_ctrl_rsp.tlast) begin
m_axis_rsp_tdata_next = '0; // TODO
m_axis_rsp_tdata_next[15:0] = '0; // rsvd
m_axis_rsp_tdata_next[31:16] = CMD_STS_OK;
m_axis_rsp_tvalid_next = 1'b1;
m_axis_rsp_tlast_next = 1'b0;