Alex Forencich
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004246608e
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Use logic instead of reg
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-07 02:14:19 -08:00 |
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Alex Forencich
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5f814e7da8
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Clean up always blocks
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-07 01:51:18 -08:00 |
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Alex Forencich
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3b95e2f279
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dma: Remove unnecessary handshake condition
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-04 17:45:54 -08:00 |
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Alex Forencich
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b0dd91aa8d
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dma: Add UltraScale PCIe DMA interface module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-04 17:18:26 -08:00 |
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Alex Forencich
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14d988d1f2
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dma: Add AXI DMA interface module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-04 12:41:07 -08:00 |
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Alex Forencich
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851919f16f
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dma: Add AXI stream sink DMA client module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-03 21:30:55 -08:00 |
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Alex Forencich
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5663572421
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dma: Add AXI stream source DMA client module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-03 21:30:20 -08:00 |
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Alex Forencich
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5b0c83fc57
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dma: Add AXI streaming DMA module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-03 17:14:24 -08:00 |
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Alex Forencich
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9442bb7fbb
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dma: Add AXI central DMA module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-03 11:42:04 -08:00 |
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Alex Forencich
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4b7e3d066d
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dma: Add SV interface for DMA descriptors
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-11-03 09:23:46 -08:00 |
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Alex Forencich
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32ed95893c
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dma: Clean up casts in DMA PSDPRAM model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-09-07 14:37:41 -07:00 |
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Alex Forencich
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40908b1b92
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Testbench cleanup for cocotb 2.0
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-09-07 10:59:38 -07:00 |
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Alex Forencich
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a6db298eeb
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dma: Add async DMA PSDPRAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-31 21:30:25 -07:00 |
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Alex Forencich
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48da5315fe
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dma: Add DMA PSDPRAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-31 21:29:55 -07:00 |
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Alex Forencich
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d57b49b29c
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dma: Add PSDPRAM simulation model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-31 21:05:20 -07:00 |
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Alex Forencich
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c5fea4d920
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dma: Add lib symlink
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-31 21:04:44 -07:00 |
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Alex Forencich
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10500e6c6c
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dma: Add DMA RAM interface
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-08-31 21:04:22 -07:00 |
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