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mirror of https://github.com/fpganinja/taxi.git synced 2025-12-12 18:18:39 -08:00
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70d77c8a95683629c2733934417bf30b04d4c80a
taxi/example/Alveo/fpga/rtl
History
Alex Forencich ed9e8ffab3 eth: Use unpacked arrays for multidimensional ports
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-03-07 11:05:58 -08:00
..
fpga_au45n.sv
example/Alveo: Add example design for Xilinx Alveo series
2025-02-25 11:34:26 -08:00
fpga_au50.sv
example/Alveo: Add example design for Xilinx Alveo series
2025-02-25 11:34:26 -08:00
fpga_au55.sv
example/Alveo: Add example design for Xilinx Alveo series
2025-02-25 11:34:26 -08:00
fpga_au200.sv
example/Alveo: Add example design for Xilinx Alveo series
2025-02-25 11:34:26 -08:00
fpga_au280.sv
example/Alveo: Add example design for Xilinx Alveo series
2025-02-25 11:34:26 -08:00
fpga_core.sv
eth: Use unpacked arrays for multidimensional ports
2025-03-07 11:05:58 -08:00
fpga_x3522.sv
example/Alveo: Add example design for Xilinx Alveo series
2025-02-25 11:34:26 -08:00
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