Alex Forencich fb69371974 lfsr: Add LFSR CRC computation module and testbench ...

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2025-02-05 15:27:44 -08:00

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axis

axis: Add COBS encoder module and testbench

2025-02-04 11:49:50 -08:00

eth

eth: Add 10G PHY module and testbench

2025-02-04 17:10:21 -08:00

io

io: Add switch debounce module

2025-02-04 00:16:34 -08:00

lfsr

lfsr: Add LFSR CRC computation module and testbench

2025-02-05 15:27:44 -08:00

lss

lss: Add UART module and testbench

2025-02-03 15:02:48 -08:00

sync

sync: Add signal synchronizer module

2025-02-03 23:43:18 -08:00