Add absolute indexed indirect

sim/verilog6502_32bit_test.py

@@ -34,6 +34,22 @@ async def handle_memory(dut):
         if we:
             memory[addr] = int(dut.DO.value)
 
+async def check_instruction_sequence(dut, instruction_sequence):
+    for expected_output in instruction_sequence:
+        await RisingEdge(dut.clk)
+
+        if expected_output:
+            expected_addr, expected_we, expected_do = expected_output
+            dut_addr = int(dut.AB.value)
+            dut_we = bool(dut.WE.value)
+            dut_do = int(dut.DO.value)
+
+            assert dut_addr == expected_addr
+            assert dut_we == expected_we
+
+            if dut_we:
+                assert dut_do == expected_do
+
 @cocotb.test
 async def test_reset(dut):
     cocotb.start_soon(Clock(dut.clk, CLK_PERIOD, unit="ns").start())
@@ -62,17 +78,7 @@ async def test_reset(dut):
         (0x12345679, False, int(dut.regfile.value)),            # Read second byte
     ]
 
-    for expected_output in expected_cpu_outputs:
-        await RisingEdge(dut.clk)
-
-        expected_addr, expected_we, expected_do = expected_output
-        dut_addr = int(dut.AB.value)
-        dut_we = bool(dut.WE.value)
-        dut_do = int(dut.DO.value)
-
-        assert dut_addr == expected_addr
-        assert dut_we == expected_we
-        assert dut_do == expected_do
+    await check_instruction_sequence(dut, expected_cpu_outputs)
 
 @cocotb.test
 async def test_absolute(dut):
@@ -120,20 +126,8 @@ async def test_absolute(dut):
         (0x50515253, True, 0x55),             # Write to absolute address
     ]
 
-    for expected_output in expected_cpu_outputs:
-        await RisingEdge(dut.clk)
+    await check_instruction_sequence(dut, expected_cpu_outputs)
 
-        if expected_output:
-            expected_addr, expected_we, expected_do = expected_output
-            dut_addr = int(dut.AB.value)
-            dut_we = bool(dut.WE.value)
-            dut_do = int(dut.DO.value)
-
-            assert dut_addr == expected_addr
-            assert dut_we == expected_we
-
-            if dut_we:
-                assert dut_do == expected_do
 
 @cocotb.test
 async def test_absolute_x(dut):
@@ -191,20 +185,8 @@ async def test_absolute_x(dut):
         (0x01020306, True, 0xaa),             # Write to address
     ]
 
-    for expected_output in expected_cpu_outputs:
-        await RisingEdge(dut.clk)
+    await check_instruction_sequence(dut, expected_cpu_outputs)
 
-        if expected_output:
-            expected_addr, expected_we, expected_do = expected_output
-            dut_addr = int(dut.AB.value)
-            dut_we = bool(dut.WE.value)
-            dut_do = int(dut.DO.value)
-
-            assert dut_addr == expected_addr
-            assert dut_we == expected_we
-
-            if dut_we:
-                assert dut_do == expected_do
 
 @cocotb.test
 async def test_absolute_y(dut):
@@ -262,17 +244,53 @@ async def test_absolute_y(dut):
         (0x01020306, True, 0xaa),             # Write to address
     ]
 
-    for expected_output in expected_cpu_outputs:
+    await check_instruction_sequence(dut, expected_cpu_outputs)
+
+
+@cocotb.test
+async def test_absolute_x_indirect(dut):
+    cocotb.start_soon(Clock(dut.clk, CLK_PERIOD, unit="ns").start())
+    cocotb.start_soon(handle_memory(dut))
+
+    write_dword(0xfffffff4, 0x200)
+
+    # ldx #1
+    # jmp ($deadbeef,x)
+    write_bytes(0x200, [0xa2, 0x01])
+    write_bytes(0x202, [0x7c, 0xef, 0xbe, 0xad, 0xde])
+    write_byte(0xbeefb055, 0xcb)
+
+    write_dword(0xdeadbeef + 1, 0xbeefb055)
+
+    dut.RDY.value = Immediate(1)
+
+    dut.reset.value = Immediate(1)
+    for _ in range(10):
         await RisingEdge(dut.clk)
+    dut.reset.value = 0
 
-        if expected_output:
-            expected_addr, expected_we, expected_do = expected_output
-            dut_addr = int(dut.AB.value)
-            dut_we = bool(dut.WE.value)
-            dut_do = int(dut.DO.value)
+    expected_cpu_outputs = [
+        None,   # ignore reset sequence
+        None,
+        None,
+        None,
+        None,
+        None,
+        None,
+        None,
+        None,
+        (0x00000200, False, None),            # ldx #1
+        (0x00000201, False, None),            # Immediate
+        (0x00000202, False, None),            # jmp ($deadbeef,x)
+        (0x00000203, False, None),            # addr 0
+        (0x00000204, False, None),            # addr 1
+        (0x00000205, False, None),            # addr 2
+        (0x00000206, False, None),            # addr 3
+        (0xdeadbef0, False, None),            # addr 0
+        (0xdeadbef1, False, None),            # addr 0
+        (0xdeadbef2, False, None),            # addr 0
+        (0xdeadbef3, False, None),            # addr 0
+        (0xbeefb055, False, None),            # 
+    ]
 
-            assert dut_addr == expected_addr
-            assert dut_we == expected_we
-
-            if dut_we:
-                assert dut_do == expected_do
+    await check_instruction_sequence(dut, expected_cpu_outputs)