Parametrize EthMac test
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -31,6 +31,14 @@ TOPLEVEL = $(DUT)
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MODULE = $(DUT)
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VERILOG_SOURCES += $(DUT).v
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# module parameters
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export PARAM_PTP_TS_WIDTH := 96
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export PARAM_PTP_TAG_WIDTH := 16
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export PARAM_AXIS_DATA_WIDTH := 64
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export PARAM_AXIS_KEEP_WIDTH := $(shell expr $(PARAM_AXIS_DATA_WIDTH) / 8 )
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export PARAM_AXIS_TX_USER_WIDTH := $(shell expr $(PARAM_PTP_TAG_WIDTH) + 1 )
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export PARAM_AXIS_RX_USER_WIDTH := $(shell expr $(PARAM_PTP_TS_WIDTH) + 1 )
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ifeq ($(SIM), icarus)
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PLUSARGS += -fst
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@@ -28,6 +28,7 @@ import logging
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import os
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import cocotb_test.simulator
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import pytest
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import cocotb
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from cocotb.clock import Clock
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@@ -45,8 +46,20 @@ class TB:
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self.log = logging.getLogger("cocotb.tb")
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self.log.setLevel(logging.DEBUG)
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cocotb.start_soon(Clock(dut.tx_clk, 6.4, units="ns").start())
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cocotb.start_soon(Clock(dut.rx_clk, 6.4, units="ns").start())
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if len(dut.tx_axis_tdata) == 8:
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clk_period = 8
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elif len(dut.tx_axis_tdata) == 32:
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clk_period = 3.102
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elif len(dut.tx_axis_tdata) == 64:
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if speed == 25e9:
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clk_period = 2.56
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else:
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clk_period = 6.206
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elif len(dut.tx_axis_tdata) == 512:
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clk_period = 3.102
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cocotb.start_soon(Clock(dut.tx_clk, clk_period, units="ns").start())
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cocotb.start_soon(Clock(dut.rx_clk, clk_period, units="ns").start())
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self.mac = EthMac(
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tx_clk=dut.tx_clk,
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@@ -157,12 +170,21 @@ def incrementing_payload(length):
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if cocotb.SIM_NAME:
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if len(cocotb.top.tx_axis_tdata) == 8:
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speed = [100e6, 1e9]
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elif len(cocotb.top.tx_axis_tdata) == 32:
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speed = [10e9]
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elif len(cocotb.top.tx_axis_tdata) == 64:
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speed = [10e9, 25e9]
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elif len(cocotb.top.tx_axis_tdata) == 512:
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speed = [100e9]
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for test in [run_test_tx, run_test_rx]:
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factory = TestFactory(test)
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factory.add_option("payload_lengths", [size_list])
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factory.add_option("payload_data", [incrementing_payload])
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factory.add_option("speed", [10e9, 1e9])
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factory.add_option("speed", speed)
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factory.generate_tests()
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@@ -171,7 +193,8 @@ if cocotb.SIM_NAME:
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tests_dir = os.path.dirname(__file__)
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def test_eth_mac(request):
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@pytest.mark.parametrize("data_width", [8, 32, 64, 512])
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def test_eth_mac(request, data_width):
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dut = "test_eth_mac"
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module = os.path.splitext(os.path.basename(__file__))[0]
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toplevel = dut
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@@ -182,6 +205,13 @@ def test_eth_mac(request):
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parameters = {}
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parameters['PTP_TS_WIDTH'] = 96
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parameters['PTP_TAG_WIDTH'] = 16
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parameters['AXIS_DATA_WIDTH'] = data_width
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parameters['AXIS_KEEP_WIDTH'] = parameters['AXIS_DATA_WIDTH'] // 8
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parameters['AXIS_TX_USER_WIDTH'] = parameters['PTP_TAG_WIDTH']+1
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parameters['AXIS_RX_USER_WIDTH'] = parameters['PTP_TS_WIDTH']+1
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extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
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sim_build = os.path.join(tests_dir, "sim_build",
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@@ -29,29 +29,37 @@ THE SOFTWARE.
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/*
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* Ethernet MAC model test
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*/
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module test_eth_mac
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module test_eth_mac #
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(
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inout wire tx_clk,
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inout wire tx_rst,
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inout wire [63:0] tx_axis_tdata,
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inout wire [7:0] tx_axis_tkeep,
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inout wire tx_axis_tlast,
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inout wire [16:0] tx_axis_tuser,
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inout wire tx_axis_tvalid,
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inout wire tx_axis_tready,
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inout wire [95:0] tx_ptp_time,
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inout wire [95:0] tx_ptp_ts,
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inout wire [15:0] tx_ptp_ts_tag,
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inout wire tx_ptp_ts_valid,
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parameter PTP_TS_WIDTH = 96,
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parameter PTP_TAG_WIDTH = 16,
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parameter AXIS_DATA_WIDTH = 64,
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parameter AXIS_KEEP_WIDTH = (AXIS_DATA_WIDTH/8),
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parameter AXIS_TX_USER_WIDTH = PTP_TAG_WIDTH+1,
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parameter AXIS_RX_USER_WIDTH = PTP_TS_WIDTH+1
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)
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(
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inout wire tx_clk,
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inout wire tx_rst,
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inout wire [AXIS_DATA_WIDTH-1:0] tx_axis_tdata,
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inout wire [AXIS_KEEP_WIDTH-1:0] tx_axis_tkeep,
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inout wire tx_axis_tlast,
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inout wire [AXIS_TX_USER_WIDTH-1:0] tx_axis_tuser,
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inout wire tx_axis_tvalid,
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inout wire tx_axis_tready,
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inout wire [PTP_TS_WIDTH-1:0] tx_ptp_time,
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inout wire [PTP_TS_WIDTH-1:0] tx_ptp_ts,
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inout wire [PTP_TAG_WIDTH-1:0] tx_ptp_ts_tag,
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inout wire tx_ptp_ts_valid,
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inout wire rx_clk,
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inout wire rx_rst,
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inout wire [63:0] rx_axis_tdata,
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inout wire [7:0] rx_axis_tkeep,
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inout wire rx_axis_tlast,
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inout wire [96:0] rx_axis_tuser,
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inout wire rx_axis_tvalid,
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inout wire [95:0] rx_ptp_time
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inout wire rx_clk,
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inout wire rx_rst,
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inout wire [AXIS_DATA_WIDTH-1:0] rx_axis_tdata,
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inout wire [AXIS_KEEP_WIDTH-1:0] rx_axis_tkeep,
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inout wire rx_axis_tlast,
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inout wire [AXIS_RX_USER_WIDTH-1:0] rx_axis_tuser,
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inout wire rx_axis_tvalid,
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inout wire [PTP_TS_WIDTH-1:0] rx_ptp_time
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);
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endmodule
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