-
8f19e45b40
Add WAI instruction
master
Byron Lathi
2026-04-18 16:02:36 -07:00
-
ef2cc5ab45
Merge pull request #1 from willisblackburn/master
David Banks
2025-12-14 14:51:12 +00:00
-
-
6b47307d48
Applied fix to DIHOLD logic that was already applied to original cpu.v core
Willis Blackburn
2025-12-13 12:02:48 -05:00
-
-
a5f605d00d
65C02: fix a bug with TSB/TRB when RDY used
David Banks
2021-06-12 16:12:21 +01:00
-
4f141c7a13
Merge remote-tracking branch 'upstream/master'
David Banks
2021-06-10 11:19:41 +01:00
-
-
fec47c5427
Fix synthesis warnings, add SYNC output
David Banks
2021-06-10 11:17:32 +01:00
-
9c1181b5e1
Remove trailing whitespace
David Banks
2021-06-10 11:16:20 +01:00
-
e6f361d764
Updated README
Arlet Ottens
2020-10-21 12:12:56 +02:00
-
a11631082b
Added fix for 1-cycle RDY bug
Arlet Ottens
2016-08-19 20:19:40 +02:00
-
791ed43bae
Updated README and 65C02 Copyright
David Banks
2016-08-01 12:36:46 +01:00
-
4053c24317
Arlet 65C02 WIP: Implement correct 65C02 BCD N/Z flags (optional, disabled)
David Banks
2016-08-01 12:02:45 +01:00
-
bf3dad7af1
Arlet 65C02 WIP: Implement NOPs (optional)
David Banks
2016-08-01 12:01:44 +01:00
-
db83fd4af9
Arlet 65C02 WIP: Implement JMP (,X)
David Banks
2016-08-01 12:01:04 +01:00
-
05e5f633f7
Arlet 65C02 WIP: Implement TSB/TXB
David Banks
2016-08-01 12:00:29 +01:00
-
c5f486730e
Arlet 65C02 WIP: Implement BIT zpx, absx, imm
David Banks
2016-08-01 11:59:46 +01:00
-
5ac9ffdd0f
Arlet 65C02 WIP: Implement STZ
David Banks
2016-08-01 11:58:59 +01:00
-
473b5bdcab
Arlet 65C02 WIP: Cosmetic
David Banks
2016-08-01 11:58:14 +01:00
-
5a7224efe0
Arlet 65C02 WIP: Implement (zp) addressing mode
David Banks
2016-08-01 11:57:23 +01:00
-
d7fdd129b1
Arlet 65C02 WIP: Implement INC A, DEC A
David Banks
2016-08-01 11:56:41 +01:00
-
7418b64cd9
Arlet 65C02 WIP: Implement BRA
David Banks
2016-08-01 11:56:01 +01:00
-
aea27b38d7
Arlet 65C02 WIP: Implement PLX,PHX,PLY,PHY
David Banks
2016-08-01 11:55:02 +01:00
-
0b422c8d71
Arlet 65C02 WIP: Copied cpu.v to cpu_65c02.v and renamed module
David Banks
2016-08-01 11:51:58 +01:00
-
-
ae653ab688
Added clarification of memory interface
Arlet Ottens
2015-08-31 20:25:47 +02:00
-
dff3abaaac
fix for bit/logic verilator keywords
Arlet Ottens
2014-10-23 20:33:44 +02:00
-
74e83fa07f
Speed up ALU path
Arlet Ottens
2012-10-06 16:21:37 +02:00
-
071e7fc9be
Fix syntax error
Arlet Ottens
2012-10-06 16:20:49 +02:00
-
3a0dfb7336
Removed $display debug
Arlet
2012-08-12 08:34:14 +02:00
-
55c26f780b
Fixed verification bugs
Arlet
2012-08-12 08:30:19 +02:00
-
a89c839d29
Added RDY term to AB Hold update
Arlet
2011-10-08 17:52:03 +02:00
-
6796444f2c
fixed typo
Arlet
2011-10-02 12:23:40 +02:00
-
3678fc4f4e
Make SEI/CLI take effect one cycle earlier.
Arlet
2011-09-27 07:17:15 +02:00
-
9b58705596
Do not set ABH/ABL in push/pull to avoid wrong PC being pushed if IRQ follows
Arlet
2011-09-27 07:14:23 +02:00
-
b1472bfe31
Fixed 'load_reg' for CLC/SEC/CLI/SEI/CLV/CLD/SED
Arlet
2011-09-27 07:11:13 +02:00
-
c51aa17b6b
Fixed '=' back to '<=' for 'backwards' signal.
Arlet
2011-06-08 06:54:11 +02:00
-
e54964f9dd
Replaced <= by = in combinatorial blocks
Arlet
2011-05-22 15:55:36 +02:00
-
c305e6d3ef
Added support for RDY
Arlet
2011-05-16 14:31:22 +02:00
-
5fe44f4b7f
first commit
Arlet
2011-05-02 19:04:14 +02:00