third-party/verilog-6502
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Arlet 3678fc4f4e Make SEI/CLI take effect one cycle earlier.
2011-09-27 07:17:15 +02:00
ALU.v
Added support for RDY
2011-05-16 14:31:22 +02:00
cpu.v
Make SEI/CLI take effect one cycle earlier.
2011-09-27 07:17:15 +02:00
README
first commit
2011-05-02 19:04:14 +02:00

README 

A Verilog HDL version of the old MOS 6502 CPU.

Have fun.
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Readme 81 KiB
Languages
Verilog 100%