26a69a2286704b24826e0a90cb6b1952976038ab
PeakRDL-busdecoder
Compile SystemRDL into a SystemVerilog control/status register (CSR) block.
For the command line tool, see the PeakRDL project.
Documentation
See the PeakRDL-busdecoder Documentation for more details
Description
Languages
Python
93.6%
SystemVerilog
6.2%
Dockerfile
0.2%