bslathi19/PeakRDL-regblock
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This commit is contained in:
Alex Mykyta
2023-03-25 22:59:23 -07:00
parent 8b9dfe5ebe
commit 2d76f6d575
3 changed files with 4 additions and 4 deletions
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2
docs/dev_notes/Validation Needed
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@@ -78,7 +78,7 @@ X Illegal property references:
next
is this ever illegal?
X If a node ispresent=true, and any of it's properties are a reference,
X If a node ispresent=true, and any of its properties are a reference,
then those references' ispresent shall also be true
This is an explicit clause in the spec: 5.3.1-i

2
docs/udps/read_buffering.rst
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@@ -34,7 +34,7 @@ enabled by compiling the following file along with your design:
``buffer_reads``
* Assigned value is a boolean.
* If true, enables double-buffering of software reads of this register.
* The read buffer will load the register's field values when it's trigger
* The read buffer will load the register's field values when its trigger
event is asserted.
* Unless specified otherwise, the buffer trigger occurs when the lowest
address of the buffered register is read.

4
src/peakrdl_regblock/udps/rw_buffering.py
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@@ -23,7 +23,7 @@ class xBufferTrigger(UDPDefinition):
# Trigger can reference a vector, but only if it is a single-bit
if value.width != 1:
self.msg.error(
"%s '%s' references %s '%s' but it's width is not 1"
"%s '%s' references %s '%s' but its width is not 1"
% (
type(node.inst).__name__.lower(), node.inst_name,
type(value.inst).__name__.lower(), value.inst_name
@@ -42,7 +42,7 @@ class xBufferTrigger(UDPDefinition):
# Trigger can reference a property, but only if it is a single-bit
if value.width != 1:
self.msg.error(
"%s '%s' references property '%s->%s' but it's width is not 1"
"%s '%s' references property '%s->%s' but its width is not 1"
% (
type(node.inst).__name__.lower(), node.inst_name,
value.node.inst_name, value.name,