Add xref to VHDL fork
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@@ -9,4 +9,4 @@ Compile SystemRDL into a SystemVerilog control/status register (CSR) block.
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For the command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io).
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## Documentation
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See the [PeakRDL-regblock Documentation](http://peakrdl-regblock.readthedocs.io) for more details
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See the [PeakRDL-regblock Documentation](https://peakrdl-regblock.readthedocs.io) for more details
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@@ -25,6 +25,13 @@ The easiest way to use PeakRDL-regblock is via the `PeakRDL command line tool <
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peakrdl regblock atxmega_spi.rdl -o regblock/ --cpuif axi4-lite
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Looking for VHDL?
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-----------------
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This project generates SystemVerilog RTL. If you prefer using VHDL, check out
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the sister project which aims to be a feature-equivalent fork of
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PeakRDL-regblock: `PeakRDL-regblock-VHDL <https://peakrdl-regblock-vhdl.readthedocs.io>`_
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Links
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-----
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