Add xref to VHDL fork

This commit is contained in:
Alex Mykyta
2025-05-02 11:07:10 -07:00
parent 8216a9f2f3
commit 62f66fb7ff
2 changed files with 8 additions and 1 deletions

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@@ -9,4 +9,4 @@ Compile SystemRDL into a SystemVerilog control/status register (CSR) block.
For the command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io).
## Documentation
See the [PeakRDL-regblock Documentation](http://peakrdl-regblock.readthedocs.io) for more details
See the [PeakRDL-regblock Documentation](https://peakrdl-regblock.readthedocs.io) for more details

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@@ -25,6 +25,13 @@ The easiest way to use PeakRDL-regblock is via the `PeakRDL command line tool <
peakrdl regblock atxmega_spi.rdl -o regblock/ --cpuif axi4-lite
Looking for VHDL?
-----------------
This project generates SystemVerilog RTL. If you prefer using VHDL, check out
the sister project which aims to be a feature-equivalent fork of
PeakRDL-regblock: `PeakRDL-regblock-VHDL <https://peakrdl-regblock-vhdl.readthedocs.io>`_
Links
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