bslathi19/PeakRDL-regblock
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Alex Mykyta
2022-07-30 23:05:21 -07:00
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[![PyPI - Python Version](https://img.shields.io/pypi/pyversions/peakrdl-regblock.svg)](https://pypi.org/project/peakrdl-regblock) [![PyPI - Python Version](https://img.shields.io/pypi/pyversions/peakrdl-regblock.svg)](https://pypi.org/project/peakrdl-regblock)
# PeakRDL-regblock # PeakRDL-regblock
Compile SystemRDL into a SystemVerilog control/status register (CSR) block Compile SystemRDL into a SystemVerilog control/status register (CSR) block.
For the command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io).
## Documentation ## Documentation
See the [PeakRDL-regblock Documentation](http://peakrdl-regblock.readthedocs.io) for more details See the [PeakRDL-regblock Documentation](http://peakrdl-regblock.readthedocs.io) for more details