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Alex Mykyta 69b579d888 Update readme
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README.md

Documentation Status build PyPI - Python Version

PeakRDL-regblock

Compile SystemRDL into a SystemVerilog control/status register (CSR) block.

For the command line tool, see the PeakRDL project.

Documentation

See the PeakRDL-regblock Documentation for more details

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SystemVerilog 42.8%
Tcl 0.3%
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