4 Commits

Author	SHA1	Message	Date
Alex Mykyta	b95ba354c3	Add simulation-time width assertions to SV interfaces. #128	2025-04-11 21:14:15 -07:00
Alex Mykyta	280c3aad17	Discard LSbs of address for AXI4-Lite CPUIF to properly handle unaligned transfers. #60	2023-08-24 20:36:28 -07:00
Alex Mykyta	ec78f2b199	Clean up cpuif data_width_bytes usage	2022-09-13 22:44:30 -07:00
Alex Mykyta	3b4289f2c6	Add APB4 cpuif	2022-09-13 22:39:36 -07:00