Byron Lathi de33a46c78 reorg

2025-11-22 12:30:57 -08:00

ip

Get it to compile

2025-11-16 23:15:46 -08:00

sim

Add basic tb that shows it kind of works

2025-11-15 15:42:09 -08:00

src

reorg

2025-11-22 12:30:57 -08:00

sub

reorg

2025-11-22 12:30:57 -08:00

sw/test

Enable Client Tag, remove ILA

2025-11-11 23:08:19 -08:00

.gitignore

Get it to compile

2025-11-16 23:15:46 -08:00

.gitmodules

Add eth dma wrapper

2025-11-15 14:37:25 -08:00

alibaba_pcie.yaml

Create project

2025-11-06 21:36:10 -08:00

init_env.sh

Create project

2025-11-06 21:36:10 -08:00

requirements.txt

reorg

2025-11-22 12:30:57 -08:00

sources.list

reorg

2025-11-22 12:30:57 -08:00

Description

No description provided

295 KiB

Languages

SystemVerilog 73.2%

Python 12.3%

C 10.9%

Tcl 2.5%

Shell 0.9%

Other 0.2%