Improve the SDIO tuning algorithm to increase stability and
performance under low-temperature conditions.
Signed-off-by: Swee Aun Khor <sakhor@efinixinc.com>
The driver supports UHS-I bus speed modes: SDR25, DDR50, and SDR104.
By default, the controller operates in SDR25 mode. Higher-speed modes
can be enabled via the Device Tree by adding the following properties
to the SDIO node:
- sd-uhs-ddr50
- sd-uhs-sdr104
When these properties are present, the driver negotiates the highest
supported UHS mode with the card and host.
Signed-off-by: Swee Aun Khor <sakhor@efinixinc.com>
riscv has selected HAVE_DMA_CONTIGUOUS, but don't call
dma_contiguous_reserve(). let's enable CMA as expect.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Ti375C529 use spi flash is25wp512m. This spi flash did not recognize by
the kernel as it missing the device id within spi-flash device driver.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
SPI flash require 8 dummy clock cycle during read operation
before it can receive the data. However, this might not needed
by other SPI device such as SD card when operate in SPI mode.
Thus, a new device tree property called 'dummy-cycle' is added
to resolve this issue. This optional device tree property is
needed for controlling the SPI flash device.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
The PHY has an issue when operating in gigabit slave mode.
It not able to transmit or receive any packet in the slave
mode. Thus, this patch enable the master mode configuration
of the phy.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
The ALDPS mode will stop the pll to save the power.
This cause the kernel crash whenever it tried to read
or write to the phy due to phy is power off state.
Disable this mode to let the phy keep alive.
Signed-off-by: Mohamad Noor Alim Hussin <mnalim@efinixinc.com>
Show the function symbols of epc and ra to improve the
readability of crash reports, and align the printing
formats about the raw epc value.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
This patch changes the current detour mechanism of dynamic ftrace
which has been discussed during LPC 2020 RISCV-MC [1].
Before the patch, we used mcount for detour:
<funca>:
addi sp,sp,-16
sd ra,8(sp)
sd s0,0(sp)
addi s0,sp,16
mv a5,ra
mv a0,a5
auipc ra,0x0 -> nop
jalr -296(ra) <_mcount@plt> ->nop
...
After the patch, we use nop call site area for detour:
<funca>:
nop -> REG_S ra, -SZREG(sp)
nop -> auipc ra, 0x?
nop -> jalr ?(ra)
nop -> REG_L ra, -SZREG(sp)
...
The mcount mechanism is mixed with gcc function prologue which is
not very clear. The patchable function entry just put 16 bytes nop
before the front of the function prologue which could be filled
with a separated detour mechanism.
[1] https://www.linuxplumbersconf.org/event/7/contributions/807/
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Allows the sections to be aligned on smaller boundaries and
therefore results in a smaller kernel image size.
Signed-off-by: Sebastien Van Cauwenberghe <svancau@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
