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deleted branch filter_verilog at Byron Lathi / fpga-sim
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accepted merge request !4 "Filter out only verilog sources (and verilator lint files)" at Byron Lathi / fpga-sim
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pushed to branch master at Byron Lathi / fpga-sim
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opened merge request !4 "Filter out only verilog sources (and verilator lint files)" at Byron Lathi / fpga-sim
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pushed new branch filter_verilog at Byron Lathi / fpga-sim
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pushed to branch exp/filter_verilog at Byron Lathi / fpga-sim
  • 59b77618 · Add VERILATOR define by default
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pushed new branch exp/filter_verilog at Byron Lathi / fpga-sim
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deleted branch experimental/incdirs at Byron Lathi / fpga-sim
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accepted merge request !3 "Experimental/incdirs" at Byron Lathi / fpga-sim
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pushed to branch master at Byron Lathi / fpga-sim
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approved merge request !3 "Experimental/incdirs" at Byron Lathi / fpga-sim
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opened merge request !3 "Experimental/incdirs" at Byron Lathi / fpga-sim
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pushed to branch experimental/incdirs at Byron Lathi / fpga-sim
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pushed to branch experimental/incdirs at Byron Lathi / fpga-sim
  • c3c828a7 · Update rtl manifest dependency
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pushed new branch experimental/incdirs at Byron Lathi / fpga-sim
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opened issue #6 "allow specifying entire yamls to run at once, not just a single test" at Byron Lathi / fpga-sim
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pushed to branch master at Byron Lathi / fpga-sim
  • 934160d6 · Limit number of jobs for verilator
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deleted branch quote_compat at Byron Lathi / fpga-sim
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accepted merge request !2 "Fix quotes for old python compatibility" at Byron Lathi / fpga-sim
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pushed to branch master at Byron Lathi / fpga-sim