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fpga6502/fpga/fpga6502.peri.xml
Byron Lathi 50f8791588 initial commit
2026-04-14 21:34:37 -07:00

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<?xml version="1.0" encoding="UTF-8"?>
<efxpt:design_db name="fpga6502" device_def="Ti375C529" version="2025.2.272" db_version="20252006" last_change_date="Thu Oct 16 18:03:43 2025" xmlns:efxpt="http://www.efinixinc.com/peri_design_db" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/peri_design_db peri_design_db.xsd ">
<efxpt:device_info>
<efxpt:iobank_info>
<efxpt:iobank name="2A" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2A_MODE_SEL"/>
<efxpt:iobank name="2B" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2B_MODE_SEL"/>
<efxpt:iobank name="2C" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2C_MODE_SEL"/>
<efxpt:iobank name="2D" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2D_MODE_SEL"/>
<efxpt:iobank name="2E" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="2E_MODE_SEL"/>
<efxpt:iobank name="4A_4B" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="4A_4B_MODE_SEL"/>
<efxpt:iobank name="4C" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="4C_MODE_SEL"/>
<efxpt:iobank name="4D" iostd="1.8 V LVCMOS" is_dyn_voltage="false" mode_sel_name="4D_MODE_SEL"/>
<efxpt:iobank name="BL2_BL3" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="BL2_BL3_MODE_SEL"/>
<efxpt:iobank name="BR0" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="BR0_MODE_SEL"/>
<efxpt:iobank name="BR3_BR4" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="BR3_BR4_MODE_SEL"/>
<efxpt:iobank name="TL1_TL5" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="TL1_TL5_MODE_SEL"/>
<efxpt:iobank name="TR0" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="TR0_MODE_SEL"/>
<efxpt:iobank name="TR1" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="TR1_MODE_SEL"/>
<efxpt:iobank name="TR2" iostd="3.3 V LVCMOS" is_dyn_voltage="false" mode_sel_name="TR2_MODE_SEL"/>
</efxpt:iobank_info>
<efxpt:ctrl_info>
<efxpt:ctrl name="cfg" ctrl_def="CONFIG_CTRL0" clock_name="" is_clk_invert="false" cbsel_bus_name="cfg_CBSEL" config_ctrl_name="cfg_CONFIG" ena_capture_name="cfg_ENA" error_status_name="cfg_ERROR" um_signal_status_name="cfg_USR_STATUS" is_remote_update_enable="false" is_user_mode_enable="false">
<efxpt:gen_param>
<efxpt:param name="remote_update_retries" value="3" value_type="int"/>
</efxpt:gen_param>
</efxpt:ctrl>
</efxpt:ctrl_info>
<efxpt:seu_info>
<efxpt:seu name="seu" block_def="CONFIG_SEU0" mode="auto" ena_detect="false" wait_interval="16500000">
<efxpt:gen_pin>
<efxpt:pin name="seu_START" type_name="START" is_bus="false"/>
<efxpt:pin name="seu_INJECT_ERROR" type_name="INJECT_ERROR" is_bus="false"/>
<efxpt:pin name="seu_RST" type_name="RST" is_bus="false"/>
<efxpt:pin name="seu_CONFIG" type_name="CONFIG" is_bus="false"/>
<efxpt:pin name="seu_ERROR" type_name="ERROR" is_bus="false"/>
<efxpt:pin name="seu_DONE" type_name="DONE" is_bus="false"/>
</efxpt:gen_pin>
</efxpt:seu>
</efxpt:seu_info>
<efxpt:clkmux_info>
<efxpt:clkmux name="GCLKMUX_B" block_def="GCLKMUX_B" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
<efxpt:gen_pin>
<efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
</efxpt:gen_pin>
</efxpt:clkmux>
<efxpt:clkmux name="GCLKMUX_L" block_def="GCLKMUX_L" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
<efxpt:gen_pin>
<efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
</efxpt:gen_pin>
</efxpt:clkmux>
<efxpt:clkmux name="GCLKMUX_R" block_def="GCLKMUX_R" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
<efxpt:gen_pin>
<efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
</efxpt:gen_pin>
</efxpt:clkmux>
<efxpt:clkmux name="GCLKMUX_T" block_def="GCLKMUX_T" is_mux_bot0_dyn="false" is_mux_bot7_dyn="false">
<efxpt:gen_pin>
<efxpt:pin name="" type_name="ROUTE0" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE1" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE2" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ROUTE3" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_0" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_OUT_7" is_bus="false"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_0" is_bus="true"/>
<efxpt:pin name="" type_name="DYN_MUX_SEL_7" is_bus="true"/>
</efxpt:gen_pin>
</efxpt:clkmux>
</efxpt:clkmux_info>
</efxpt:device_info>
<efxpt:gpio_info>
<efxpt:comp_gpio name="io_gpio_sw_n" gpio_def="GPIOL_52" mode="input" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="io_gpio_sw_n" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="io_gpio_sw_n_PULL_UP_ENA" dyn_delay_en_name="io_gpio_sw_n_DLY_ENA" dyn_delay_reset_name="io_gpio_sw_n_DLY_RST" dyn_delay_ctrl_name="io_gpio_sw_n_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="phy_mdc" gpio_def="GPIOT_N_54" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="phy_mdc" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="true" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="phy_mdio" gpio_def="GPIOT_P_55" mode="inout" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="phy_mdi" name_ddio_lo="" conn_type="normal" is_register="true" clock_name="io_tseClk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="phy_mdio_PULL_UP_ENA" dyn_delay_en_name="phy_mdio_DLY_ENA" dyn_delay_reset_name="phy_mdio_DLY_RST" dyn_delay_ctrl_name="phy_mdio_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="phy_mdo" name_ddio_lo="" register_option="register" clock_name="io_tseClk" is_clock_inverted="false" is_slew_rate="true" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="phy_mdo_en" is_register="true" clock_name="io_tseClk" is_clock_inverted="false" name_oen="phy_mdio_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="phy_rstn" gpio_def="GPIOR_144" mode="inout" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="phy_rstn_IN" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="phy_rstn_PULL_UP_ENA" dyn_delay_en_name="phy_rstn_DLY_ENA" dyn_delay_reset_name="phy_rstn_DLY_RST" dyn_delay_ctrl_name="phy_rstn_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="phy_rstn_OUT" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="__gnd__" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="phy_rst" is_register="false" clock_name="" is_clock_inverted="false" name_oen="phy_rstn_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rx_ctl" gpio_def="GPIOT_N_56" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rx_ctl_HI" name_ddio_lo="rgmii_rx_ctl_LO" conn_type="normal" is_register="true" clock_name="rgmii_rxc" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="resync" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rx_ctl_PULL_UP_ENA" dyn_delay_en_name="rgmii_rx_ctl_DLY_ENA" dyn_delay_reset_name="rgmii_rx_ctl_DLY_RST" dyn_delay_ctrl_name="rgmii_rx_ctl_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rxc_phy" gpio_def="GPIOT_N_55" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rxc_phy" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxc_phy_PULL_UP_ENA" dyn_delay_en_name="rgmii_rxc_phy_DLY_ENA" dyn_delay_reset_name="rgmii_rxc_phy_DLY_RST" dyn_delay_ctrl_name="rgmii_rxc_phy_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rxc_slow" gpio_def="GPIOT_P_59" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rxc_slow" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxc_slow_PULL_UP_ENA" dyn_delay_en_name="rgmii_rxc_slow_DLY_ENA" dyn_delay_reset_name="rgmii_rxc_slow_DLY_RST" dyn_delay_ctrl_name="rgmii_rxc_slow_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rxd[0]" gpio_def="GPIOT_P_57" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rxd_HI[0]" name_ddio_lo="rgmii_rxd_LO[0]" conn_type="normal" is_register="true" clock_name="rgmii_rxc" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="resync" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[0]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[0]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[0]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[0]" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rxd[1]" gpio_def="GPIOT_N_57" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rxd_HI[1]" name_ddio_lo="rgmii_rxd_LO[1]" conn_type="normal" is_register="true" clock_name="rgmii_rxc" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="resync" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[1]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[1]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[1]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[1]" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rxd[2]" gpio_def="GPIOT_P_58" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rxd_HI[2]" name_ddio_lo="rgmii_rxd_LO[2]" conn_type="normal" is_register="true" clock_name="rgmii_rxc" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="resync" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[2]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[2]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[2]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[2]" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_rxd[3]" gpio_def="GPIOT_N_58" mode="input" bus_name="rgmii_rxd" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="rgmii_rxd_HI[3]" name_ddio_lo="rgmii_rxd_LO[3]" conn_type="normal" is_register="true" clock_name="rgmii_rxc" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="resync" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="rgmii_rxd_PULL_UP_ENA[3]" dyn_delay_en_name="rgmii_rxd_DLY_ENA[3]" dyn_delay_reset_name="rgmii_rxd_DLY_RST[3]" dyn_delay_ctrl_name="rgmii_rxd_DLY_CTRL[3]" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_tx_ctl" gpio_def="GPIOT_N_51" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="rgmii_tx_ctl_HI" name_ddio_lo="rgmii_tx_ctl_LO" register_option="register" clock_name="io_tseClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="16" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_txc" gpio_def="GPIOT_P_52" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="rgmii_txc_HI" name_ddio_lo="rgmii_txc_LO" register_option="register" clock_name="io_tseClk_90" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="16" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_txd[0]" gpio_def="GPIOT_N_52" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="rgmii_txd_HI[0]" name_ddio_lo="rgmii_txd_LO[0]" register_option="register" clock_name="io_tseClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="16" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_txd[1]" gpio_def="GPIOT_P_53" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="rgmii_txd_HI[1]" name_ddio_lo="rgmii_txd_LO[1]" register_option="register" clock_name="io_tseClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="16" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_txd[2]" gpio_def="GPIOT_N_53" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="rgmii_txd_HI[2]" name_ddio_lo="rgmii_txd_LO[2]" register_option="register" clock_name="io_tseClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="16" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="rgmii_txd[3]" gpio_def="GPIOT_P_54" mode="output" bus_name="rgmii_txd" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="rgmii_txd_HI[3]" name_ddio_lo="rgmii_txd_LO[3]" register_option="register" clock_name="io_tseClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="resync" delay="0" is_serial="false" drive_strength="16" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_cd_n" gpio_def="GPIOT_P_49" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="sd_cd_n" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_cd_n_PULL_UP_ENA" dyn_delay_en_name="sd_cd_n_DLY_ENA" dyn_delay_reset_name="sd_cd_n_DLY_RST" dyn_delay_ctrl_name="sd_cd_n_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_clk" gpio_def="GPIOR_166" mode="output" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:output_config name="sd_clk_hi" name_ddio_lo="" register_option="register" clock_name="sd_base_clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="2" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_cmd" gpio_def="GPIOR_167" mode="inout" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="sd_cmd_i" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_cmd_PULL_UP_ENA" dyn_delay_en_name="sd_cmd_DLY_ENA" dyn_delay_reset_name="sd_cmd_DLY_RST" dyn_delay_ctrl_name="sd_cmd_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="sd_cmd_o" name_ddio_lo="" register_option="none" clock_name="sd_base_clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="sd_cmd_oe" is_register="false" clock_name="sd_base_clk" is_clock_inverted="false" name_oen="sd_cmd_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_dat[0]" gpio_def="GPIOR_168" mode="inout" bus_name="sd_dat" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="sd_dat_i[0]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_dat_PULL_UP_ENA[0]" dyn_delay_en_name="sd_dat_DLY_ENA[0]" dyn_delay_reset_name="sd_dat_DLY_RST[0]" dyn_delay_ctrl_name="sd_dat_DLY_CTRL[0]" clkmux_buf_name=""/>
<efxpt:output_config name="sd_dat_o[0]" name_ddio_lo="" register_option="none" clock_name="sd_base_clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="sd_dat_oe[0]" is_register="false" clock_name="sd_base_clk" is_clock_inverted="false" name_oen="sd_dat_OEN[0]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_dat[1]" gpio_def="GPIOR_169" mode="inout" bus_name="sd_dat" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="sd_dat_i[1]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_dat_PULL_UP_ENA[1]" dyn_delay_en_name="sd_dat_DLY_ENA[1]" dyn_delay_reset_name="sd_dat_DLY_RST[1]" dyn_delay_ctrl_name="sd_dat_DLY_CTRL[1]" clkmux_buf_name=""/>
<efxpt:output_config name="sd_dat_o[1]" name_ddio_lo="" register_option="none" clock_name="sd_base_clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="sd_dat_oe[1]" is_register="false" clock_name="sd_base_clk" is_clock_inverted="false" name_oen="sd_dat_OEN[1]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_dat[2]" gpio_def="GPIOR_170" mode="inout" bus_name="sd_dat" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="sd_dat_i[2]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_dat_PULL_UP_ENA[2]" dyn_delay_en_name="sd_dat_DLY_ENA[2]" dyn_delay_reset_name="sd_dat_DLY_RST[2]" dyn_delay_ctrl_name="sd_dat_DLY_CTRL[2]" clkmux_buf_name=""/>
<efxpt:output_config name="sd_dat_o[2]" name_ddio_lo="" register_option="none" clock_name="sd_base_clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="sd_dat_oe[2]" is_register="false" clock_name="sd_base_clk" is_clock_inverted="false" name_oen="sd_dat_OEN[2]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_dat[3]" gpio_def="GPIOR_171" mode="inout" bus_name="sd_dat" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="sd_dat_i[3]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_dat_PULL_UP_ENA[3]" dyn_delay_en_name="sd_dat_DLY_ENA[3]" dyn_delay_reset_name="sd_dat_DLY_RST[3]" dyn_delay_ctrl_name="sd_dat_DLY_CTRL[3]" clkmux_buf_name=""/>
<efxpt:output_config name="sd_dat_o[3]" name_ddio_lo="" register_option="none" clock_name="sd_base_clk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="sd_dat_oe[3]" is_register="false" clock_name="sd_base_clk" is_clock_inverted="false" name_oen="sd_dat_OEN[3]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="sd_wp" gpio_def="GPIOR_102" mode="input" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="sd_wp" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="sd_wp_PULL_UP_ENA" dyn_delay_en_name="sd_wp_DLY_ENA" dyn_delay_reset_name="sd_wp_DLY_RST" dyn_delay_ctrl_name="sd_wp_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="soc_pll_peri_clk_ext_clk" gpio_def="GPIOT_P_50" mode="input" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="soc_pll_peri_clk_ext_clk" name_ddio_lo="" conn_type="pll_clkin" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="soc_pll_peri_clk_ext_clk_PULL_UP_ENA" dyn_delay_en_name="soc_pll_peri_clk_ext_clk_DLY_ENA" dyn_delay_reset_name="soc_pll_peri_clk_ext_clk_DLY_RST" dyn_delay_ctrl_name="soc_pll_peri_clk_ext_clk_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="soc_pll_sys_clk_ext_clk" gpio_def="GPIOL_25" mode="input" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="soc_pll_sys_clk_ext_clk" name_ddio_lo="" conn_type="pll_clkin" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="soc_pll_sys_clk_ext_clk_PULL_UP_ENA" dyn_delay_en_name="soc_pll_sys_clk_ext_clk_DLY_ENA" dyn_delay_reset_name="soc_pll_sys_clk_ext_clk_DLY_RST" dyn_delay_ctrl_name="soc_pll_sys_clk_ext_clk_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_gpio_0_io[0]" gpio_def="GPIOT_P_19" mode="inout" bus_name="system_gpio_0_io" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="system_gpio_0_io_read[0]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_gpio_0_io_PULL_UP_ENA[0]" dyn_delay_en_name="system_gpio_0_io_DLY_ENA[0]" dyn_delay_reset_name="system_gpio_0_io_DLY_RST[0]" dyn_delay_ctrl_name="system_gpio_0_io_DLY_CTRL[0]" clkmux_buf_name=""/>
<efxpt:output_config name="system_gpio_0_io_write[0]" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="system_gpio_0_io_writeEnable[0]" is_register="false" clock_name="" is_clock_inverted="false" name_oen="system_gpio_0_io_OEN[0]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_gpio_0_io[1]" gpio_def="GPIOL_23" mode="inout" bus_name="system_gpio_0_io" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="system_gpio_0_io_read[1]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_gpio_0_io_PULL_UP_ENA[1]" dyn_delay_en_name="system_gpio_0_io_DLY_ENA[1]" dyn_delay_reset_name="system_gpio_0_io_DLY_RST[1]" dyn_delay_ctrl_name="system_gpio_0_io_DLY_CTRL[1]" clkmux_buf_name=""/>
<efxpt:output_config name="system_gpio_0_io_write[1]" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="2" fastclk_name=""/>
<efxpt:output_enable_config name="system_gpio_0_io_writeEnable[1]" is_register="false" clock_name="" is_clock_inverted="false" name_oen="system_gpio_0_io_OEN[1]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_gpio_0_io[2]" gpio_def="GPIOL_24" mode="inout" bus_name="system_gpio_0_io" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="system_gpio_0_io_read[2]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_gpio_0_io_PULL_UP_ENA[2]" dyn_delay_en_name="system_gpio_0_io_DLY_ENA[2]" dyn_delay_reset_name="system_gpio_0_io_DLY_RST[2]" dyn_delay_ctrl_name="system_gpio_0_io_DLY_CTRL[2]" clkmux_buf_name=""/>
<efxpt:output_config name="system_gpio_0_io_write[2]" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="2" fastclk_name=""/>
<efxpt:output_enable_config name="system_gpio_0_io_writeEnable[2]" is_register="false" clock_name="" is_clock_inverted="false" name_oen="system_gpio_0_io_OEN[2]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_gpio_0_io[3]" gpio_def="GPIOT_N_50" mode="inout" bus_name="system_gpio_0_io" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="system_gpio_0_io_read[3]" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_gpio_0_io_PULL_UP_ENA[3]" dyn_delay_en_name="system_gpio_0_io_DLY_ENA[3]" dyn_delay_reset_name="system_gpio_0_io_DLY_RST[3]" dyn_delay_ctrl_name="system_gpio_0_io_DLY_CTRL[3]" clkmux_buf_name=""/>
<efxpt:output_config name="system_gpio_0_io_write[3]" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="system_gpio_0_io_writeEnable[3]" is_register="false" clock_name="" is_clock_inverted="false" name_oen="system_gpio_0_io_OEN[3]"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_i2c_0_io_scl" gpio_def="GPIOL_85" mode="inout" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="system_i2c_0_io_scl_read" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_i2c_0_io_scl_PULL_UP_ENA" dyn_delay_en_name="system_i2c_0_io_scl_DLY_ENA" dyn_delay_reset_name="system_i2c_0_io_scl_DLY_RST" dyn_delay_ctrl_name="system_i2c_0_io_scl_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="system_i2c_0_io_scl_write" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="2" fastclk_name=""/>
<efxpt:output_enable_config name="system_i2c_0_io_scl_writeEnable" is_register="false" clock_name="" is_clock_inverted="false" name_oen="system_i2c_0_io_scl_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_i2c_0_io_sda" gpio_def="GPIOL_84" mode="inout" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="system_i2c_0_io_sda_read" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_i2c_0_io_sda_PULL_UP_ENA" dyn_delay_en_name="system_i2c_0_io_sda_DLY_ENA" dyn_delay_reset_name="system_i2c_0_io_sda_DLY_RST" dyn_delay_ctrl_name="system_i2c_0_io_sda_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="system_i2c_0_io_sda_write" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="2" fastclk_name=""/>
<efxpt:output_enable_config name="system_i2c_0_io_sda_writeEnable" is_register="false" clock_name="" is_clock_inverted="false" name_oen="system_i2c_0_io_sda_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_spi_0_io_data_0" gpio_def="GPIOB_N_40" mode="inout" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="system_spi_0_io_data_0_read" name_ddio_lo="" conn_type="normal" is_register="true" clock_name="io_peripheralClk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_spi_0_io_data_0_PULL_UP_ENA" dyn_delay_en_name="system_spi_0_io_data_0_DLY_ENA" dyn_delay_reset_name="system_spi_0_io_data_0_DLY_RST" dyn_delay_ctrl_name="system_spi_0_io_data_0_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="system_spi_0_io_data_0_write" name_ddio_lo="" register_option="register" clock_name="io_peripheralClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="system_spi_0_io_data_0_writeEnable" is_register="true" clock_name="io_peripheralClk" is_clock_inverted="false" name_oen="system_spi_0_io_data_0_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_spi_0_io_data_1" gpio_def="GPIOB_P_40" mode="inout" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:input_config name="system_spi_0_io_data_1_read" name_ddio_lo="" conn_type="normal" is_register="true" clock_name="io_peripheralClk" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_spi_0_io_data_1_PULL_UP_ENA" dyn_delay_en_name="system_spi_0_io_data_1_DLY_ENA" dyn_delay_reset_name="system_spi_0_io_data_1_DLY_RST" dyn_delay_ctrl_name="system_spi_0_io_data_1_DLY_CTRL" clkmux_buf_name=""/>
<efxpt:output_config name="system_spi_0_io_data_1_write" name_ddio_lo="" register_option="register" clock_name="io_peripheralClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
<efxpt:output_enable_config name="system_spi_0_io_data_1_writeEnable" is_register="true" clock_name="io_peripheralClk" is_clock_inverted="false" name_oen="system_spi_0_io_data_1_OEN"/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_spi_0_io_sclk_write" gpio_def="GPIOB_P_39" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="system_spi_0_io_sclk_write" name_ddio_lo="" register_option="register" clock_name="io_peripheralClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_spi_0_io_ss" gpio_def="GPIOB_N_38" mode="output" bus_name="" io_standard="1.8 V LVCMOS">
<efxpt:output_config name="system_spi_0_io_ss[0]" name_ddio_lo="" register_option="register" clock_name="io_peripheralClk" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="4" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_uart_0_io_rxd" gpio_def="GPIOR_145" mode="input" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:input_config name="system_uart_0_io_rxd" name_ddio_lo="" conn_type="normal" is_register="false" clock_name="" is_clock_inverted="false" pull_option="none" is_schmitt_trigger="false" ddio_type="none" is_bus_hold="false" delay="0" is_serial="false" is_dyn_delay="false" fastclk_name="" pullup_ena_name="system_uart_0_io_rxd_PULL_UP_ENA" dyn_delay_en_name="system_uart_0_io_rxd_DLY_ENA" dyn_delay_reset_name="system_uart_0_io_rxd_DLY_RST" dyn_delay_ctrl_name="system_uart_0_io_rxd_DLY_CTRL" clkmux_buf_name=""/>
</efxpt:comp_gpio>
<efxpt:comp_gpio name="system_uart_0_io_txd" gpio_def="GPIOR_165" mode="output" bus_name="" io_standard="3.3 V LVCMOS">
<efxpt:output_config name="system_uart_0_io_txd" name_ddio_lo="" register_option="none" clock_name="" is_clock_inverted="false" is_slew_rate="false" tied_option="none" ddio_type="none" delay="0" is_serial="false" drive_strength="2" fastclk_name=""/>
</efxpt:comp_gpio>
<efxpt:global_unused_config state="input with weak pullup"/>
<efxpt:bus name="system_gpio_0_io" mode="inout" msb="3" lsb="0"/>
<efxpt:bus name="rgmii_rxd" mode="input" msb="3" lsb="0"/>
<efxpt:bus name="rgmii_txd" mode="output" msb="3" lsb="0"/>
<efxpt:bus name="sd_dat" mode="inout" msb="3" lsb="0"/>
</efxpt:gpio_info>
<efxpt:pll_info>
<efxpt:pll name="soc_pll_sys_clk" pll_def="PLL_BL0" ref_clock_name="" ref_clock_freq="100.0000" multiplier="1" pre_divider="1" post_divider="1" reset_name="" locked_name="pll_system_locked" is_ipfrz="false" is_bypass_lock="true">
<efxpt:adv_prop ref_clock_mode="external" ref_clock1_name="" ext_ref_clock_id="3" clksel_name="" feedback_clock_name="io_sysFbClk" feedback_mode="local"/>
<efxpt:gen_pin>
<efxpt:pin name="" type_name="SHIFT_ENA" is_bus="false"/>
<efxpt:pin name="" type_name="DESKEWED" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_DATA_IN" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_DATA_OUT" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_SEL" is_bus="false"/>
<efxpt:pin name="" type_name="USER_SSC_EN" is_bus="false"/>
<efxpt:pin name="" type_name="SHIFT" is_bus="true"/>
<efxpt:pin name="" type_name="SHIFT_SEL" is_bus="true"/>
<efxpt:pin name="" type_name="CFG_CLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
</efxpt:gen_pin>
<efxpt:comp_output_clock name="io_sysFbClk" number="0" out_divider="40" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_systemClk" number="1" out_divider="4" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param>
<efxpt:param name="HALF_DC_SHIFT_EN" value="false" value_type="bool"/>
<efxpt:param name="PDIV" value="2" value_type="int"/>
<efxpt:param name="PROG_DUTY_CYCLE_EN" value="false" value_type="bool"/>
<efxpt:param name="REQUEST_DUTY_CYCLE" value="50.0000" value_type="float"/>
<efxpt:param name="SWALLOWING_DIV" value="2" value_type="int"/>
</efxpt:gen_param>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_memoryClk" number="2" out_divider="16" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="ddrClk" number="3" out_divider="5" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_prop/>
<efxpt:gen_param>
<efxpt:param name="DYN_RECONFIG_EN" value="false" value_type="bool"/>
<efxpt:param name="FRACTIONAL_EN" value="false" value_type="bool"/>
<efxpt:param name="FRACTIONAL_K" value="0" value_type="int"/>
<efxpt:param name="REFCLK" value="EXT_CLK1" value_type="str"/>
<efxpt:param name="SSC_AMPLITUDE" value="0.5000" value_type="float"/>
<efxpt:param name="SSC_EN" value="DISABLE" value_type="str"/>
<efxpt:param name="SSC_FREQUENCY" value="30.0000" value_type="float"/>
<efxpt:param name="SSC_MODULATION_TYPE" value="DOWN" value_type="str"/>
</efxpt:gen_param>
</efxpt:pll>
<efxpt:pll name="soc_pll_peri_clk" pll_def="PLL_TR0" ref_clock_name="" ref_clock_freq="25.0000" multiplier="4" pre_divider="1" post_divider="1" reset_name="" locked_name="pll_peripheral_locked" is_ipfrz="false" is_bypass_lock="true">
<efxpt:adv_prop ref_clock_mode="external" ref_clock1_name="" ext_ref_clock_id="2" clksel_name="" feedback_clock_name="io_memFbClk" feedback_mode="local"/>
<efxpt:gen_pin>
<efxpt:pin name="" type_name="SHIFT_ENA" is_bus="false"/>
<efxpt:pin name="" type_name="DESKEWED" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_DATA_IN" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_DATA_OUT" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_SEL" is_bus="false"/>
<efxpt:pin name="" type_name="USER_SSC_EN" is_bus="false"/>
<efxpt:pin name="" type_name="SHIFT" is_bus="true"/>
<efxpt:pin name="" type_name="SHIFT_SEL" is_bus="true"/>
<efxpt:pin name="" type_name="CFG_CLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
</efxpt:gen_pin>
<efxpt:comp_output_clock name="io_memFbClk" number="0" out_divider="40" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_peripheralClk" number="1" out_divider="20" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param>
<efxpt:param name="HALF_DC_SHIFT_EN" value="false" value_type="bool"/>
<efxpt:param name="PDIV" value="10" value_type="int"/>
<efxpt:param name="PROG_DUTY_CYCLE_EN" value="false" value_type="bool"/>
<efxpt:param name="REQUEST_DUTY_CYCLE" value="50.0000" value_type="float"/>
<efxpt:param name="SWALLOWING_DIV" value="10" value_type="int"/>
</efxpt:gen_param>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_ddrMasters_0_clk" number="2" out_divider="16" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_cfuClk" number="3" out_divider="32" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="sd_base_clk" number="4" out_divider="40" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_prop/>
<efxpt:gen_param>
<efxpt:param name="DYN_RECONFIG_EN" value="false" value_type="bool"/>
<efxpt:param name="FRACTIONAL_EN" value="false" value_type="bool"/>
<efxpt:param name="FRACTIONAL_K" value="0" value_type="int"/>
<efxpt:param name="REFCLK" value="EXT_CLK0" value_type="str"/>
<efxpt:param name="SSC_AMPLITUDE" value="0.5000" value_type="float"/>
<efxpt:param name="SSC_EN" value="DISABLE" value_type="str"/>
<efxpt:param name="SSC_FREQUENCY" value="30.0000" value_type="float"/>
<efxpt:param name="SSC_MODULATION_TYPE" value="DOWN" value_type="str"/>
</efxpt:gen_param>
</efxpt:pll>
<efxpt:pll name="tse_pll_clk" pll_def="PLL_BL2" ref_clock_name="rgmii_rxc_phy" ref_clock_freq="125.0000" multiplier="1" pre_divider="1" post_divider="4" reset_name="" locked_name="pll_tse_locked" is_ipfrz="false" is_bypass_lock="true">
<efxpt:adv_prop ref_clock_mode="core" ref_clock1_name="" ext_ref_clock_id="2" clksel_name="" feedback_clock_name="tse_pll_clk_CLKOUT0" feedback_mode="local"/>
<efxpt:gen_pin>
<efxpt:pin name="" type_name="SHIFT_ENA" is_bus="false"/>
<efxpt:pin name="" type_name="DESKEWED" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_DATA_IN" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_DATA_OUT" is_bus="false"/>
<efxpt:pin name="" type_name="CFG_SEL" is_bus="false"/>
<efxpt:pin name="" type_name="USER_SSC_EN" is_bus="false"/>
<efxpt:pin name="" type_name="SHIFT" is_bus="true"/>
<efxpt:pin name="" type_name="SHIFT_SEL" is_bus="true"/>
<efxpt:pin name="" type_name="CFG_CLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
</efxpt:gen_pin>
<efxpt:comp_output_clock name="tse_pll_clk_CLKOUT0" number="0" out_divider="10" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="rgmii_rxc" number="1" out_divider="10" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param>
<efxpt:param name="HALF_DC_SHIFT_EN" value="false" value_type="bool"/>
<efxpt:param name="PDIV" value="5" value_type="int"/>
<efxpt:param name="PROG_DUTY_CYCLE_EN" value="false" value_type="bool"/>
<efxpt:param name="REQUEST_DUTY_CYCLE" value="50.0000" value_type="float"/>
<efxpt:param name="SWALLOWING_DIV" value="5" value_type="int"/>
</efxpt:gen_param>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_tseClk_90" number="2" out_divider="10" is_dyn_phase="false" phase_setting="5" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_output_clock name="io_tseClk" number="3" out_divider="10" is_dyn_phase="false" phase_setting="0" is_inverted="false" conn_type="gclk" clkmux_buf_name="">
<efxpt:gen_pin/>
<efxpt:gen_param/>
</efxpt:comp_output_clock>
<efxpt:comp_prop/>
<efxpt:gen_param>
<efxpt:param name="DYN_RECONFIG_EN" value="false" value_type="bool"/>
<efxpt:param name="FRACTIONAL_EN" value="false" value_type="bool"/>
<efxpt:param name="FRACTIONAL_K" value="0" value_type="int"/>
<efxpt:param name="REFCLK" value="CORE_CLK1" value_type="str"/>
<efxpt:param name="SSC_AMPLITUDE" value="0.5000" value_type="float"/>
<efxpt:param name="SSC_EN" value="DISABLE" value_type="str"/>
<efxpt:param name="SSC_FREQUENCY" value="30.0000" value_type="float"/>
<efxpt:param name="SSC_MODULATION_TYPE" value="DOWN" value_type="str"/>
</efxpt:gen_param>
</efxpt:pll>
</efxpt:pll_info>
<efxpt:osc_info/>
<efxpt:lvds_info/>
<efxpt:jtag_info>
<efxpt:jtag name="soc_jtag_inst1" jtag_def="JTAG_USER1">
<efxpt:gen_pin>
<efxpt:pin name="ut_jtagCtrl_capture" type_name="CAPTURE" is_bus="false"/>
<efxpt:pin name="" type_name="DRCK" is_bus="false"/>
<efxpt:pin name="ut_jtagCtrl_reset" type_name="RESET" is_bus="false"/>
<efxpt:pin name="" type_name="RUNTEST" is_bus="false"/>
<efxpt:pin name="ut_jtagCtrl_enable" type_name="SEL" is_bus="false"/>
<efxpt:pin name="ut_jtagCtrl_shift" type_name="SHIFT" is_bus="false"/>
<efxpt:pin name="jtagCtrl_tck" type_name="TCK" is_bus="false"/>
<efxpt:pin name="ut_jtagCtrl_tdi" type_name="TDI" is_bus="false"/>
<efxpt:pin name="" type_name="TMS" is_bus="false"/>
<efxpt:pin name="ut_jtagCtrl_update" type_name="UPDATE" is_bus="false"/>
<efxpt:pin name="ut_jtagCtrl_tdo" type_name="TDO" is_bus="false"/>
</efxpt:gen_pin>
</efxpt:jtag>
</efxpt:jtag_info>
<efxpt:ddr_info>
<efxpt:adv_ddr name="soc_ddr_inst1" ddr_def="DDR_0" clkin_sel="0" data_width="32" physical_rank="1" mem_type="LPDDR4x" mem_density="8G">
<efxpt:axi_target0 is_axi_width_256="false" is_axi_enable="false">
<efxpt:gen_pin_axi>
<efxpt:pin name="" type_name="ACLK_0" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ARSTN_0" is_bus="false"/>
<efxpt:pin name="" type_name="ARAPCMD_0" is_bus="false"/>
<efxpt:pin name="" type_name="ARREADY_0" is_bus="false"/>
<efxpt:pin name="" type_name="ARVALID_0" is_bus="false"/>
<efxpt:pin name="" type_name="ARLOCK_0" is_bus="false"/>
<efxpt:pin name="" type_name="ARQOS_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWAPCMD_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWALLSTRB_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWCOBUF_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWREADY_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWVALID_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWLOCK_0" is_bus="false"/>
<efxpt:pin name="" type_name="AWQOS_0" is_bus="false"/>
<efxpt:pin name="" type_name="BREADY_0" is_bus="false"/>
<efxpt:pin name="" type_name="BVALID_0" is_bus="false"/>
<efxpt:pin name="" type_name="RLAST_0" is_bus="false"/>
<efxpt:pin name="" type_name="RREADY_0" is_bus="false"/>
<efxpt:pin name="" type_name="RVALID_0" is_bus="false"/>
<efxpt:pin name="" type_name="WLAST_0" is_bus="false"/>
<efxpt:pin name="" type_name="WREADY_0" is_bus="false"/>
<efxpt:pin name="" type_name="WVALID_0" is_bus="false"/>
<efxpt:pin name="" type_name="ARADDR_0" is_bus="true"/>
<efxpt:pin name="" type_name="ARBURST_0" is_bus="true"/>
<efxpt:pin name="" type_name="ARID_0" is_bus="true"/>
<efxpt:pin name="" type_name="ARLEN_0" is_bus="true"/>
<efxpt:pin name="" type_name="ARSIZE_0" is_bus="true"/>
<efxpt:pin name="" type_name="AWADDR_0" is_bus="true"/>
<efxpt:pin name="" type_name="AWBURST_0" is_bus="true"/>
<efxpt:pin name="" type_name="AWID_0" is_bus="true"/>
<efxpt:pin name="" type_name="AWLEN_0" is_bus="true"/>
<efxpt:pin name="" type_name="AWSIZE_0" is_bus="true"/>
<efxpt:pin name="" type_name="AWCACHE_0" is_bus="true"/>
<efxpt:pin name="" type_name="BID_0" is_bus="true"/>
<efxpt:pin name="" type_name="BRESP_0" is_bus="true"/>
<efxpt:pin name="" type_name="RDATA_0" is_bus="true"/>
<efxpt:pin name="" type_name="RID_0" is_bus="true"/>
<efxpt:pin name="" type_name="RRESP_0" is_bus="true"/>
<efxpt:pin name="" type_name="WDATA_0" is_bus="true"/>
<efxpt:pin name="" type_name="WSTRB_0" is_bus="true"/>
</efxpt:gen_pin_axi>
</efxpt:axi_target0>
<efxpt:axi_target1 is_axi_width_256="false" is_axi_enable="false">
<efxpt:gen_pin_axi>
<efxpt:pin name="" type_name="ACLK_1" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="ARSTN_1" is_bus="false"/>
<efxpt:pin name="" type_name="ARAPCMD_1" is_bus="false"/>
<efxpt:pin name="" type_name="ARREADY_1" is_bus="false"/>
<efxpt:pin name="" type_name="ARVALID_1" is_bus="false"/>
<efxpt:pin name="" type_name="ARLOCK_1" is_bus="false"/>
<efxpt:pin name="" type_name="ARQOS_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWAPCMD_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWALLSTRB_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWCOBUF_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWREADY_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWVALID_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWLOCK_1" is_bus="false"/>
<efxpt:pin name="" type_name="AWQOS_1" is_bus="false"/>
<efxpt:pin name="" type_name="BREADY_1" is_bus="false"/>
<efxpt:pin name="" type_name="BVALID_1" is_bus="false"/>
<efxpt:pin name="" type_name="RLAST_1" is_bus="false"/>
<efxpt:pin name="" type_name="RREADY_1" is_bus="false"/>
<efxpt:pin name="" type_name="RVALID_1" is_bus="false"/>
<efxpt:pin name="" type_name="WLAST_1" is_bus="false"/>
<efxpt:pin name="" type_name="WREADY_1" is_bus="false"/>
<efxpt:pin name="" type_name="WVALID_1" is_bus="false"/>
<efxpt:pin name="" type_name="ARADDR_1" is_bus="true"/>
<efxpt:pin name="" type_name="ARBURST_1" is_bus="true"/>
<efxpt:pin name="" type_name="ARID_1" is_bus="true"/>
<efxpt:pin name="" type_name="ARLEN_1" is_bus="true"/>
<efxpt:pin name="" type_name="ARSIZE_1" is_bus="true"/>
<efxpt:pin name="" type_name="AWADDR_1" is_bus="true"/>
<efxpt:pin name="" type_name="AWBURST_1" is_bus="true"/>
<efxpt:pin name="" type_name="AWID_1" is_bus="true"/>
<efxpt:pin name="" type_name="AWLEN_1" is_bus="true"/>
<efxpt:pin name="" type_name="AWSIZE_1" is_bus="true"/>
<efxpt:pin name="" type_name="AWCACHE_1" is_bus="true"/>
<efxpt:pin name="" type_name="BID_1" is_bus="true"/>
<efxpt:pin name="" type_name="BRESP_1" is_bus="true"/>
<efxpt:pin name="" type_name="RDATA_1" is_bus="true"/>
<efxpt:pin name="" type_name="RID_1" is_bus="true"/>
<efxpt:pin name="" type_name="RRESP_1" is_bus="true"/>
<efxpt:pin name="" type_name="WDATA_1" is_bus="true"/>
<efxpt:pin name="" type_name="WSTRB_1" is_bus="true"/>
</efxpt:gen_pin_axi>
</efxpt:axi_target1>
<efxpt:gen_pin_controller>
<efxpt:pin name="io_sysFbClk" type_name="CTRL_CLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_INT" type_name="CTRL_INT" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_MEM_RST_VALID" type_name="CTRL_MEM_RST_VALID" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_REFRESH" type_name="CTRL_REFRESH" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_BUSY" type_name="CTRL_BUSY" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_CMD_Q_ALMOST_FULL" type_name="CTRL_CMD_Q_ALMOST_FULL" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_DP_IDLE" type_name="CTRL_DP_IDLE" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_CKE" type_name="CTRL_CKE" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_PORT_BUSY" type_name="CTRL_PORT_BUSY" is_bus="true"/>
</efxpt:gen_pin_controller>
<efxpt:gen_pin_cfg_ctrl>
<efxpt:pin name="cfg_done" type_name="CFG_DONE" is_bus="false"/>
<efxpt:pin name="cfg_start" type_name="CFG_START" is_bus="false"/>
<efxpt:pin name="cfg_reset" type_name="CFG_RESET" is_bus="false"/>
<efxpt:pin name="cfg_sel" type_name="CFG_SEL" is_bus="false"/>
</efxpt:gen_pin_cfg_ctrl>
<efxpt:ctrl_reg_inf is_reg_ena="false">
<efxpt:gen_pin_ctrl_reg_inf>
<efxpt:pin name="" type_name="CR_ACLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARESETN" type_name="CR_ARESETN" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARVALID" type_name="CR_ARVALID" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARREADY" type_name="CR_ARREADY" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWVALID" type_name="CR_AWVALID" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWREADY" type_name="CR_AWREADY" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_BVALID" type_name="CR_BVALID" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_BREADY" type_name="CR_BREADY" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_RLAST" type_name="CR_RLAST" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_RVALID" type_name="CR_RVALID" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_RREADY" type_name="CR_RREADY" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_WLAST" type_name="CR_WLAST" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_WVALID" type_name="CR_WVALID" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_WREADY" type_name="CR_WREADY" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CFG_PHY_RSTN" type_name="CFG_PHY_RSTN" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CTRL_RSTN" type_name="CTRL_RSTN" is_bus="false"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARADDR" type_name="CR_ARADDR" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARID" type_name="CR_ARID" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARLEN" type_name="CR_ARLEN" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARSIZE" type_name="CR_ARSIZE" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_ARBURST" type_name="CR_ARBURST" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWADDR" type_name="CR_AWADDR" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWID" type_name="CR_AWID" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWLEN" type_name="CR_AWLEN" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWSIZE" type_name="CR_AWSIZE" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_AWBURST" type_name="CR_AWBURST" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_BID" type_name="CR_BID" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_BRESP" type_name="CR_BRESP" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_RDATA" type_name="CR_RDATA" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_RID" type_name="CR_RID" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_RRESP" type_name="CR_RRESP" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_WDATA" type_name="CR_WDATA" is_bus="true"/>
<efxpt:pin name="soc_ddr_inst1_CR_WSTRB" type_name="CR_WSTRB" is_bus="true"/>
</efxpt:gen_pin_ctrl_reg_inf>
</efxpt:ctrl_reg_inf>
<efxpt:cs_fpga>
<efxpt:param name="DQ_PULLDOWN_DRV" value="34.3" value_type="str"/>
<efxpt:param name="DQ_PULLDOWN_ODT" value="60" value_type="str"/>
<efxpt:param name="DQ_PULLUP_DRV" value="34.3" value_type="str"/>
<efxpt:param name="DQ_PULLUP_ODT" value="Hi-Z" value_type="str"/>
<efxpt:param name="FPGA_VREF_RANGE0" value="20.300" value_type="float"/>
<efxpt:param name="FPGA_VREF_RANGE1" value="23.000" value_type="float"/>
<efxpt:param name="MEM_FPGA_VREF_RANGE" value="Range 1" value_type="str"/>
</efxpt:cs_fpga>
<efxpt:cs_memory>
<efxpt:param name="BLEN" value="BL=16 Sequential" value_type="str"/>
<efxpt:param name="CA_ODT_CS0" value="RZQ/4" value_type="str"/>
<efxpt:param name="CA_ODT_CS1" value="RZQ/6" value_type="str"/>
<efxpt:param name="CA_VREF_RANGE0" value="22.000" value_type="float"/>
<efxpt:param name="CA_VREF_RANGE1" value="22.000" value_type="float"/>
<efxpt:param name="DQ_ODT_CS0" value="RZQ/4" value_type="str"/>
<efxpt:param name="DQ_ODT_CS1" value="RZQ/4" value_type="str"/>
<efxpt:param name="DQ_VREF_RANGE0" value="20.000" value_type="float"/>
<efxpt:param name="DQ_VREF_RANGE1" value="27.200" value_type="float"/>
<efxpt:param name="MEM_CA_RANGE" value="RANGE[1]" value_type="str"/>
<efxpt:param name="MEM_DQ_RANGE" value="RANGE[1]" value_type="str"/>
<efxpt:param name="NWR" value="nWR=6" value_type="str"/>
<efxpt:param name="ODTD_CA_CS0" value="Obeys ODT_CA Bond Pad" value_type="str"/>
<efxpt:param name="ODTD_CA_CS1" value="Obeys ODT_CA Bond Pad" value_type="str"/>
<efxpt:param name="ODTE_CK_CS0" value="Override Disabled" value_type="str"/>
<efxpt:param name="ODTE_CK_CS1" value="Override Disabled" value_type="str"/>
<efxpt:param name="ODTE_CS_CS0" value="Override Disabled" value_type="str"/>
<efxpt:param name="ODTE_CS_CS1" value="Override Disabled" value_type="str"/>
<efxpt:param name="PDDS_CS0" value="RZQ/6" value_type="str"/>
<efxpt:param name="PDDS_CS1" value="RZQ/6" value_type="str"/>
<efxpt:param name="RL_DBI_READ" value="Yes" value_type="str"/>
<efxpt:param name="RL_DBI_READ_DISABLED" value="RL=6,nRTP=8" value_type="str"/>
<efxpt:param name="RL_DBI_READ_ENABLED" value="RL=6,nRTP=8" value_type="str"/>
<efxpt:param name="RL_DBI_WRITE" value="Yes" value_type="str"/>
<efxpt:param name="WL_SET" value="Set A" value_type="str"/>
<efxpt:param name="WL_SET_A" value="WL=4" value_type="str"/>
<efxpt:param name="WL_SET_B" value="WL=4" value_type="str"/>
</efxpt:cs_memory>
<efxpt:cs_memory_timing>
<efxpt:param name="tCCD" value="8" value_type="int"/>
<efxpt:param name="tCCDMW" value="32" value_type="int"/>
<efxpt:param name="tFAW" value="40.000" value_type="float"/>
<efxpt:param name="tPPD" value="4" value_type="int"/>
<efxpt:param name="tRAS" value="42.000" value_type="float"/>
<efxpt:param name="tRCD" value="18.000" value_type="float"/>
<efxpt:param name="tRPab" value="21.000" value_type="float"/>
<efxpt:param name="tRPpb" value="18.000" value_type="float"/>
<efxpt:param name="tRRD" value="10.000" value_type="float"/>
<efxpt:param name="tRTP" value="7.500" value_type="float"/>
<efxpt:param name="tSR" value="15.000" value_type="float"/>
<efxpt:param name="tWR" value="18.000" value_type="float"/>
<efxpt:param name="tWTR" value="10.000" value_type="float"/>
</efxpt:cs_memory_timing>
<efxpt:pin_swap>
<efxpt:param name="CA[0]" value="CA[0]" value_type="str"/>
<efxpt:param name="CA[1]" value="CA[1]" value_type="str"/>
<efxpt:param name="CA[2]" value="CA[2]" value_type="str"/>
<efxpt:param name="CA[3]" value="CA[3]" value_type="str"/>
<efxpt:param name="CA[4]" value="CA[4]" value_type="str"/>
<efxpt:param name="CA[5]" value="CA[5]" value_type="str"/>
<efxpt:param name="DM[0]" value="DM[0]" value_type="str"/>
<efxpt:param name="DM[1]" value="DM[1]" value_type="str"/>
<efxpt:param name="DM[2]" value="DM[2]" value_type="str"/>
<efxpt:param name="DM[3]" value="DM[3]" value_type="str"/>
<efxpt:param name="DQ[0]" value="DQ[3]" value_type="str"/>
<efxpt:param name="DQ[10]" value="DQ[12]" value_type="str"/>
<efxpt:param name="DQ[11]" value="DQ[11]" value_type="str"/>
<efxpt:param name="DQ[12]" value="DQ[8]" value_type="str"/>
<efxpt:param name="DQ[13]" value="DQ[10]" value_type="str"/>
<efxpt:param name="DQ[14]" value="DQ[13]" value_type="str"/>
<efxpt:param name="DQ[15]" value="DQ[14]" value_type="str"/>
<efxpt:param name="DQ[16]" value="DQ[22]" value_type="str"/>
<efxpt:param name="DQ[17]" value="DQ[17]" value_type="str"/>
<efxpt:param name="DQ[18]" value="DQ[18]" value_type="str"/>
<efxpt:param name="DQ[19]" value="DQ[19]" value_type="str"/>
<efxpt:param name="DQ[1]" value="DQ[6]" value_type="str"/>
<efxpt:param name="DQ[20]" value="DQ[16]" value_type="str"/>
<efxpt:param name="DQ[21]" value="DQ[20]" value_type="str"/>
<efxpt:param name="DQ[22]" value="DQ[21]" value_type="str"/>
<efxpt:param name="DQ[23]" value="DQ[23]" value_type="str"/>
<efxpt:param name="DQ[24]" value="DQ[29]" value_type="str"/>
<efxpt:param name="DQ[25]" value="DQ[31]" value_type="str"/>
<efxpt:param name="DQ[26]" value="DQ[28]" value_type="str"/>
<efxpt:param name="DQ[27]" value="DQ[30]" value_type="str"/>
<efxpt:param name="DQ[28]" value="DQ[25]" value_type="str"/>
<efxpt:param name="DQ[29]" value="DQ[27]" value_type="str"/>
<efxpt:param name="DQ[2]" value="DQ[4]" value_type="str"/>
<efxpt:param name="DQ[30]" value="DQ[26]" value_type="str"/>
<efxpt:param name="DQ[31]" value="DQ[24]" value_type="str"/>
<efxpt:param name="DQ[3]" value="DQ[5]" value_type="str"/>
<efxpt:param name="DQ[4]" value="DQ[0]" value_type="str"/>
<efxpt:param name="DQ[5]" value="DQ[1]" value_type="str"/>
<efxpt:param name="DQ[6]" value="DQ[7]" value_type="str"/>
<efxpt:param name="DQ[7]" value="DQ[2]" value_type="str"/>
<efxpt:param name="DQ[8]" value="DQ[15]" value_type="str"/>
<efxpt:param name="DQ[9]" value="DQ[9]" value_type="str"/>
<efxpt:param name="ENABLE_PIN_SWAP" value="true" value_type="bool"/>
</efxpt:pin_swap>
</efxpt:adv_ddr>
</efxpt:ddr_info>
<efxpt:mipi_dphy_info/>
<efxpt:soc_info>
<efxpt:soc name="qcrv32_inst1" block_def="SOC_0">
<efxpt:gen_param>
<efxpt:param name="AXI_MASTER_EN" value="true" value_type="bool"/>
<efxpt:param name="AXI_SLAVE_EN" value="true" value_type="bool"/>
<efxpt:param name="CUSTOM_INSTRUCTION_0_EN" value="true" value_type="bool"/>
<efxpt:param name="CUSTOM_INSTRUCTION_1_EN" value="true" value_type="bool"/>
<efxpt:param name="CUSTOM_INSTRUCTION_2_EN" value="true" value_type="bool"/>
<efxpt:param name="CUSTOM_INSTRUCTION_3_EN" value="true" value_type="bool"/>
<efxpt:param name="JTAG_TYPE" value="FPGA" value_type="str"/>
<efxpt:param name="MEM_CLK_SOURCE" value="Clock 0" value_type="str"/>
<efxpt:param name="OCR_FILE_PATH" value="" value_type="str"/>
<efxpt:param name="PIPELINE_SOC_AXI_MEM_INTERFACE_EN" value="false" value_type="bool"/>
<efxpt:param name="SYS_CLK_SOURCE" value="Clock 0" value_type="str"/>
<efxpt:param name="WRITEBUFFER_SOC_AXI_INTERFACE_EN" value="false" value_type="bool"/>
</efxpt:gen_param>
<efxpt:gen_pin>
<efxpt:pin name="axiAInterrupt" type_name="AXIAINTERRUPT" is_bus="false"/>
<efxpt:pin name="axiA_araddr" type_name="AXIA_ARADDR" is_bus="true"/>
<efxpt:pin name="axiA_arburst" type_name="AXIA_ARBURST" is_bus="true"/>
<efxpt:pin name="axiA_arcache" type_name="AXIA_ARCACHE" is_bus="true"/>
<efxpt:pin name="axiA_arlen" type_name="AXIA_ARLEN" is_bus="true"/>
<efxpt:pin name="axiA_arlock" type_name="AXIA_ARLOCK" is_bus="false"/>
<efxpt:pin name="axiA_arprot" type_name="AXIA_ARPROT" is_bus="true"/>
<efxpt:pin name="axiA_arqos" type_name="AXIA_ARQOS" is_bus="true"/>
<efxpt:pin name="axiA_arready" type_name="AXIA_ARREADY" is_bus="false"/>
<efxpt:pin name="axiA_arregion" type_name="AXIA_ARREGION" is_bus="true"/>
<efxpt:pin name="axiA_arsize" type_name="AXIA_ARSIZE" is_bus="true"/>
<efxpt:pin name="axiA_arvalid" type_name="AXIA_ARVALID" is_bus="false"/>
<efxpt:pin name="axiA_awaddr" type_name="AXIA_AWADDR" is_bus="true"/>
<efxpt:pin name="axiA_awburst" type_name="AXIA_AWBURST" is_bus="true"/>
<efxpt:pin name="axiA_awcache" type_name="AXIA_AWCACHE" is_bus="true"/>
<efxpt:pin name="axiA_awlen" type_name="AXIA_AWLEN" is_bus="true"/>
<efxpt:pin name="axiA_awlock" type_name="AXIA_AWLOCK" is_bus="false"/>
<efxpt:pin name="axiA_awprot" type_name="AXIA_AWPROT" is_bus="true"/>
<efxpt:pin name="axiA_awqos" type_name="AXIA_AWQOS" is_bus="true"/>
<efxpt:pin name="axiA_awready" type_name="AXIA_AWREADY" is_bus="false"/>
<efxpt:pin name="axiA_awregion" type_name="AXIA_AWREGION" is_bus="true"/>
<efxpt:pin name="axiA_awsize" type_name="AXIA_AWSIZE" is_bus="true"/>
<efxpt:pin name="axiA_awvalid" type_name="AXIA_AWVALID" is_bus="false"/>
<efxpt:pin name="axiA_bready" type_name="AXIA_BREADY" is_bus="false"/>
<efxpt:pin name="axiA_bresp" type_name="AXIA_BRESP" is_bus="true"/>
<efxpt:pin name="axiA_bvalid" type_name="AXIA_BVALID" is_bus="false"/>
<efxpt:pin name="axiA_rdata" type_name="AXIA_RDATA" is_bus="true"/>
<efxpt:pin name="axiA_rlast" type_name="AXIA_RLAST" is_bus="false"/>
<efxpt:pin name="axiA_rready" type_name="AXIA_RREADY" is_bus="false"/>
<efxpt:pin name="axiA_rresp" type_name="AXIA_RRESP" is_bus="true"/>
<efxpt:pin name="axiA_rvalid" type_name="AXIA_RVALID" is_bus="false"/>
<efxpt:pin name="axiA_wdata" type_name="AXIA_WDATA" is_bus="true"/>
<efxpt:pin name="axiA_wlast" type_name="AXIA_WLAST" is_bus="false"/>
<efxpt:pin name="axiA_wready" type_name="AXIA_WREADY" is_bus="false"/>
<efxpt:pin name="axiA_wstrb" type_name="AXIA_WSTRB" is_bus="true"/>
<efxpt:pin name="axiA_wvalid" type_name="AXIA_WVALID" is_bus="false"/>
<efxpt:pin name="cpu0_customInstruction_cmd_ready" type_name="CPU0_CUSTOMINSTRUCTION_CMD_READY" is_bus="false"/>
<efxpt:pin name="cpu0_customInstruction_cmd_valid" type_name="CPU0_CUSTOMINSTRUCTION_CMD_VALID" is_bus="false"/>
<efxpt:pin name="cpu0_customInstruction_function_id" type_name="CPU0_CUSTOMINSTRUCTION_FUNCTION_ID" is_bus="true"/>
<efxpt:pin name="cpu0_customInstruction_inputs_0" type_name="CPU0_CUSTOMINSTRUCTION_INPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu0_customInstruction_inputs_1" type_name="CPU0_CUSTOMINSTRUCTION_INPUTS_1" is_bus="true"/>
<efxpt:pin name="cpu0_customInstruction_outputs_0" type_name="CPU0_CUSTOMINSTRUCTION_OUTPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu0_customInstruction_rsp_ready" type_name="CPU0_CUSTOMINSTRUCTION_RSP_READY" is_bus="false"/>
<efxpt:pin name="cpu0_customInstruction_rsp_valid" type_name="CPU0_CUSTOMINSTRUCTION_RSP_VALID" is_bus="false"/>
<efxpt:pin name="cpu1_customInstruction_cmd_ready" type_name="CPU1_CUSTOMINSTRUCTION_CMD_READY" is_bus="false"/>
<efxpt:pin name="cpu1_customInstruction_cmd_valid" type_name="CPU1_CUSTOMINSTRUCTION_CMD_VALID" is_bus="false"/>
<efxpt:pin name="cpu1_customInstruction_function_id" type_name="CPU1_CUSTOMINSTRUCTION_FUNCTION_ID" is_bus="true"/>
<efxpt:pin name="cpu1_customInstruction_inputs_0" type_name="CPU1_CUSTOMINSTRUCTION_INPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu1_customInstruction_inputs_1" type_name="CPU1_CUSTOMINSTRUCTION_INPUTS_1" is_bus="true"/>
<efxpt:pin name="cpu1_customInstruction_outputs_0" type_name="CPU1_CUSTOMINSTRUCTION_OUTPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu1_customInstruction_rsp_ready" type_name="CPU1_CUSTOMINSTRUCTION_RSP_READY" is_bus="false"/>
<efxpt:pin name="cpu1_customInstruction_rsp_valid" type_name="CPU1_CUSTOMINSTRUCTION_RSP_VALID" is_bus="false"/>
<efxpt:pin name="cpu2_customInstruction_cmd_ready" type_name="CPU2_CUSTOMINSTRUCTION_CMD_READY" is_bus="false"/>
<efxpt:pin name="cpu2_customInstruction_cmd_valid" type_name="CPU2_CUSTOMINSTRUCTION_CMD_VALID" is_bus="false"/>
<efxpt:pin name="cpu2_customInstruction_function_id" type_name="CPU2_CUSTOMINSTRUCTION_FUNCTION_ID" is_bus="true"/>
<efxpt:pin name="cpu2_customInstruction_inputs_0" type_name="CPU2_CUSTOMINSTRUCTION_INPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu2_customInstruction_inputs_1" type_name="CPU2_CUSTOMINSTRUCTION_INPUTS_1" is_bus="true"/>
<efxpt:pin name="cpu2_customInstruction_outputs_0" type_name="CPU2_CUSTOMINSTRUCTION_OUTPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu2_customInstruction_rsp_ready" type_name="CPU2_CUSTOMINSTRUCTION_RSP_READY" is_bus="false"/>
<efxpt:pin name="cpu2_customInstruction_rsp_valid" type_name="CPU2_CUSTOMINSTRUCTION_RSP_VALID" is_bus="false"/>
<efxpt:pin name="cpu3_customInstruction_cmd_ready" type_name="CPU3_CUSTOMINSTRUCTION_CMD_READY" is_bus="false"/>
<efxpt:pin name="cpu3_customInstruction_cmd_valid" type_name="CPU3_CUSTOMINSTRUCTION_CMD_VALID" is_bus="false"/>
<efxpt:pin name="cpu3_customInstruction_function_id" type_name="CPU3_CUSTOMINSTRUCTION_FUNCTION_ID" is_bus="true"/>
<efxpt:pin name="cpu3_customInstruction_inputs_0" type_name="CPU3_CUSTOMINSTRUCTION_INPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu3_customInstruction_inputs_1" type_name="CPU3_CUSTOMINSTRUCTION_INPUTS_1" is_bus="true"/>
<efxpt:pin name="cpu3_customInstruction_outputs_0" type_name="CPU3_CUSTOMINSTRUCTION_OUTPUTS_0" is_bus="true"/>
<efxpt:pin name="cpu3_customInstruction_rsp_ready" type_name="CPU3_CUSTOMINSTRUCTION_RSP_READY" is_bus="false"/>
<efxpt:pin name="cpu3_customInstruction_rsp_valid" type_name="CPU3_CUSTOMINSTRUCTION_RSP_VALID" is_bus="false"/>
<efxpt:pin name="io_asyncReset" type_name="IO_ASYNCRESET" is_bus="false"/>
<efxpt:pin name="io_cfuClk" type_name="IO_CFUCLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="io_cfuReset" type_name="IO_CFURESET" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_addr" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_ADDR" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_burst" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_BURST" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_cache" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_CACHE" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_id" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_ID" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_len" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_LEN" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_lock" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_LOCK" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_prot" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_PROT" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_qos" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_QOS" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_region" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_REGION" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_payload_size" type_name="IO_DDRMASTERS_0_AR_PAYLOAD_SIZE" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_ar_ready" type_name="IO_DDRMASTERS_0_AR_READY" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_ar_valid" type_name="IO_DDRMASTERS_0_AR_VALID" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_addr" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_ADDR" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_allStrb" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_ALLSTRB" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_burst" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_BURST" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_cache" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_CACHE" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_id" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_ID" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_len" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_LEN" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_lock" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_LOCK" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_prot" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_PROT" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_qos" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_QOS" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_region" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_REGION" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_payload_size" type_name="IO_DDRMASTERS_0_AW_PAYLOAD_SIZE" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_aw_ready" type_name="IO_DDRMASTERS_0_AW_READY" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_aw_valid" type_name="IO_DDRMASTERS_0_AW_VALID" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_b_payload_id" type_name="IO_DDRMASTERS_0_B_PAYLOAD_ID" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_b_payload_resp" type_name="IO_DDRMASTERS_0_B_PAYLOAD_RESP" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_b_ready" type_name="IO_DDRMASTERS_0_B_READY" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_b_valid" type_name="IO_DDRMASTERS_0_B_VALID" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_clk" type_name="IO_DDRMASTERS_0_CLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="io_ddrMasters_0_reset" type_name="IO_DDRMASTERS_0_RESET" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_r_payload_data" type_name="IO_DDRMASTERS_0_R_PAYLOAD_DATA" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_r_payload_id" type_name="IO_DDRMASTERS_0_R_PAYLOAD_ID" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_r_payload_last" type_name="IO_DDRMASTERS_0_R_PAYLOAD_LAST" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_r_payload_resp" type_name="IO_DDRMASTERS_0_R_PAYLOAD_RESP" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_r_ready" type_name="IO_DDRMASTERS_0_R_READY" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_r_valid" type_name="IO_DDRMASTERS_0_R_VALID" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_w_payload_data" type_name="IO_DDRMASTERS_0_W_PAYLOAD_DATA" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_w_payload_last" type_name="IO_DDRMASTERS_0_W_PAYLOAD_LAST" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_w_payload_strb" type_name="IO_DDRMASTERS_0_W_PAYLOAD_STRB" is_bus="true"/>
<efxpt:pin name="io_ddrMasters_0_w_ready" type_name="IO_DDRMASTERS_0_W_READY" is_bus="false"/>
<efxpt:pin name="io_ddrMasters_0_w_valid" type_name="IO_DDRMASTERS_0_W_VALID" is_bus="false"/>
<efxpt:pin name="" type_name="IO_JTAG_TCK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="IO_JTAG_TDI" is_bus="false"/>
<efxpt:pin name="" type_name="IO_JTAG_TDO" is_bus="false"/>
<efxpt:pin name="" type_name="IO_JTAG_TMS" is_bus="false"/>
<efxpt:pin name="io_peripheralClk" type_name="IO_PERIPHERALCLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="io_peripheralReset" type_name="IO_PERIPHERALRESET" is_bus="false"/>
<efxpt:pin name="io_systemReset" type_name="IO_SYSTEMRESET" is_bus="false"/>
<efxpt:pin name="jtagCtrl_capture" type_name="JTAGCTRL_CAPTURE" is_bus="false"/>
<efxpt:pin name="jtagCtrl_enable" type_name="JTAGCTRL_ENABLE" is_bus="false"/>
<efxpt:pin name="jtagCtrl_reset" type_name="JTAGCTRL_RESET" is_bus="false"/>
<efxpt:pin name="jtagCtrl_shift" type_name="JTAGCTRL_SHIFT" is_bus="false"/>
<efxpt:pin name="jtagCtrl_tck" type_name="JTAGCTRL_TCK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="jtagCtrl_tdi" type_name="JTAGCTRL_TDI" is_bus="false"/>
<efxpt:pin name="jtagCtrl_tdo" type_name="JTAGCTRL_TDO" is_bus="false"/>
<efxpt:pin name="jtagCtrl_update" type_name="JTAGCTRL_UPDATE" is_bus="false"/>
<efxpt:pin name="" type_name="MEM_SHUTDOWN" is_bus="false"/>
<efxpt:pin name="" type_name="TEST_PCR_CLK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="T_ATPG_NMBIST" is_bus="false"/>
<efxpt:pin name="" type_name="T_COMP_EN" is_bus="false"/>
<efxpt:pin name="" type_name="T_COMP_MASK_EN" is_bus="false"/>
<efxpt:pin name="" type_name="T_COMP_MASK_LD" is_bus="false"/>
<efxpt:pin name="" type_name="T_DFT_CLOCK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="T_LOS_EN" is_bus="false"/>
<efxpt:pin name="" type_name="T_OPCG_ENABLE" is_bus="false"/>
<efxpt:pin name="" type_name="T_OPCG_LOAD" is_bus="false"/>
<efxpt:pin name="" type_name="T_OPCG_TRIGGER" is_bus="false"/>
<efxpt:pin name="" type_name="T_PMDA_DONE" is_bus="false"/>
<efxpt:pin name="" type_name="T_PMDA_FAIL" is_bus="false"/>
<efxpt:pin name="" type_name="T_PMDA_RESET" is_bus="false"/>
<efxpt:pin name="" type_name="T_PMDA_TCK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="T_PMDA_TDI" is_bus="false"/>
<efxpt:pin name="" type_name="T_PMDA_TDO" is_bus="false"/>
<efxpt:pin name="" type_name="T_RSTN" is_bus="false"/>
<efxpt:pin name="" type_name="T_SCANIN" is_bus="true"/>
<efxpt:pin name="" type_name="T_SCANOUT" is_bus="true"/>
<efxpt:pin name="" type_name="T_SCK" is_bus="false" is_clk="true" is_clk_invert="false"/>
<efxpt:pin name="" type_name="T_SE" is_bus="false"/>
<efxpt:pin name="" type_name="T_SE_CG" is_bus="false"/>
<efxpt:pin name="" type_name="T_TM" is_bus="false"/>
<efxpt:pin name="userInterruptA" type_name="USERINTERRUPTA" is_bus="false"/>
<efxpt:pin name="userInterruptB" type_name="USERINTERRUPTB" is_bus="false"/>
<efxpt:pin name="userInterruptC" type_name="USERINTERRUPTC" is_bus="false"/>
<efxpt:pin name="userInterruptD" type_name="USERINTERRUPTD" is_bus="false"/>
<efxpt:pin name="userInterruptE" type_name="USERINTERRUPTE" is_bus="false"/>
<efxpt:pin name="userInterruptF" type_name="USERINTERRUPTF" is_bus="false"/>
<efxpt:pin name="userInterruptG" type_name="USERINTERRUPTG" is_bus="false"/>
<efxpt:pin name="userInterruptH" type_name="USERINTERRUPTH" is_bus="false"/>
<efxpt:pin name="userInterruptI" type_name="USERINTERRUPTI" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTJ" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTK" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTL" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTM" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTN" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTO" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTP" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTQ" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTR" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTS" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTT" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTU" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTV" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTW" is_bus="false"/>
<efxpt:pin name="" type_name="USERINTERRUPTX" is_bus="false"/>
</efxpt:gen_pin>
</efxpt:soc>
</efxpt:soc_info>
</efxpt:design_db>
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