Reduce sd_controller addr width from 4 to 3

hw/fpga/hvl/sd_cmd_testbench.sv

@@ -8,7 +8,7 @@ logic clk;
 logic clk_50;
 logic rst;
 
-logic [3:0] addr;
+logic [2:0] addr;
 logic [7:0] data;
 logic cs;
 

hw/fpga/sd_controller.sv

@@ -2,7 +2,7 @@ module sd_controller(
     input clk,
     input rst,
 
-    input [3:0] addr,
+    input [2:0] addr,
     input [7:0] data,
     input cs,