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Move SDRAM and state machine into its own file

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Cleans up the top level module a bit
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Byron Lathi
2022-03-17 17:49:20 -05:00
parent 7cb3183f85
commit 42a718408d
4 changed files with 122 additions and 63 deletions
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hw/fpga/super6502.qsf
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@@ -350,6 +350,7 @@ set_location_assignment PIN_V22 -to DRAM_LDQM
set_location_assignment PIN_U22 -to DRAM_RAS_N
set_location_assignment PIN_J21 -to DRAM_UDQM
set_location_assignment PIN_V20 -to DRAM_WE_N
set_global_assignment -name SYSTEMVERILOG_FILE sdram.sv
set_global_assignment -name QIP_FILE sdram_platform/synthesis/sdram_platform.qip
set_global_assignment -name SYSTEMVERILOG_FILE uart.sv
set_global_assignment -name SYSTEMVERILOG_FILE addr_decode.sv