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Move fast signals to fast reset

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This commit is contained in:
Byron Lathi
2023-11-23 12:06:19 -08:00
parent aba37ec98d
commit 8721c816fc
2 changed files with 12 additions and 5 deletions
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15
hw/efinix_fpga/src/spi_controller.sv
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@@ -43,12 +43,8 @@ logic working;
always @(negedge i_clk_cpu) begin always @(negedge i_clk_cpu) begin
if (i_rst) begin if (i_rst) begin
r_baud_rate <= 8'h1; r_baud_rate <= 8'h1;
r_input_data <= '0;
r_output_data <= '0; r_output_data <= '0;
r_control <= '0; r_control <= '0;
r_clock_counter <= '0;
count <= '0;
spi_clk <= '0;
active <= '0; active <= '0;
end else begin end else begin
active <= '0; active <= '0;
@@ -71,8 +67,19 @@ end
logic active_f; logic active_f;
logic [7:0] r_output_data_f; logic [7:0] r_output_data_f;
logic reset_f;
always @(posedge i_clk_50) begin
reset_f <= i_rst;
end
always @(posedge i_clk_50) begin always @(posedge i_clk_50) begin
if (reset_f) begin
r_input_data <= '0;
r_clock_counter <= '0;
count <= '0;
spi_clk <= '0;
end
if (active_f) begin if (active_f) begin
r_spi_mosi <= r_output_data_f[7]; r_spi_mosi <= r_output_data_f[7];
r_clock_counter <= r_clock_counter + 9'b1; r_clock_counter <= r_clock_counter + 9'b1;

2
hw/efinix_fpga/super6502.xml
View File

@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<efx:project name="super6502" description="" last_change_date="Sun November 19 2023 15:04:04" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2022.2.322" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="sync" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd"> <efx:project name="super6502" description="" last_change_date="Thu November 23 2023 12:03:00" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="sync" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
<efx:device_info> <efx:device_info>
<efx:family name="Trion"/> <efx:family name="Trion"/>
<efx:device name="T20F256"/> <efx:device name="T20F256"/>