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Add LED module and address decoding; disable LA

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The Logic analyzer isn't that useful anyway since it does not track
rising and falling edges.
This commit is contained in:
Byron Lathi
2022-12-20 19:26:24 -05:00
parent aefa3d23f3
commit b8161e3082
8 changed files with 181 additions and 39 deletions
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4
hw/efinix_fpga/ip/bram/bram_ini.vh
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@@ -4,7 +4,7 @@ input integer index;//Mode type
input integer val_; //Port A index, Port B Index, Number of Items in Loop, Port A Start, Port B Start, reserved
case (index)
0: bram_ini_table=
(val_== 0)?256'h0000000000000000000000000000000000000000000000000000010004c000ea:
(val_== 0)?256'h00000000000000000fe00080000fa000d00003a000ef000ff0008d000ff000a9:
(val_== 1)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_== 2)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_== 3)?256'h0000000000000000000000000000000000000000000000000000000000000000:
@@ -23,7 +23,7 @@ case (index)
(val_==16)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_==17)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_==18)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_==19)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_==19)?256'h0000000000000ff0000000000000000000000000000000000000000000000000:
(val_==20)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_==21)?256'h0000000000000000000000000000000000000000000000000000000000000000:
(val_==22)?256'h0000000000000000000000000000000000000000000000000000000000000000:

22
hw/efinix_fpga/ip/bram/init_hex.mem
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@@ -1,6 +1,13 @@
ea
4c
01
a9
ff
8d
ff
ef
3a
d0
fa
80
fe
00
00
00
@@ -244,13 +251,6 @@ ea
00
00
00
ff
00
00
00
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00
00
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00
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