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Rewrite readblock in assembly

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This commit is contained in:
Byron Lathi
2023-08-08 19:28:10 -07:00
parent 446f4e7539
commit e73c4e1d08
7 changed files with 606 additions and 560 deletions
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296
hw/efinix_fpga/debug_profile.wizard.json
View File

@@ -3,7 +3,7 @@
{ {
"name": "la0", "name": "la0",
"type": "la", "type": "la",
"uuid": "fc5ad0b7db9846e2b64719110e7975d8", "uuid": "3116afbb3c1645178391686859e56041",
"trigin_en": false, "trigin_en": false,
"trigout_en": false, "trigout_en": false,
"auto_inserted": true, "auto_inserted": true,
@@ -21,48 +21,43 @@
"width": 1, "width": 1,
"probe_type": 1 "probe_type": 1
}, },
{
"name": "cpu_sync",
"width": 1,
"probe_type": 1
},
{
"name": "cpu_resb",
"width": 1,
"probe_type": 1
},
{ {
"name": "cpu_addr", "name": "cpu_addr",
"width": 16, "width": 16,
"probe_type": 1 "probe_type": 1
}, },
{ {
"name": "cpu_phi2", "name": "cpu_sync",
"width": 1, "width": 1,
"probe_type": 1 "probe_type": 1
}, },
{ {
"name": "spi_clk", "name": "cpu_rdy",
"width": 1, "width": 1,
"probe_type": 1 "probe_type": 1
}, },
{ {
"name": "spi_mosi", "name": "spi_controller/r_input_data",
"width": 8,
"probe_type": 1
},
{
"name": "spi_controller/r_output_data",
"width": 8,
"probe_type": 1
},
{
"name": "spi_controller/o_spi_clk",
"width": 1, "width": 1,
"probe_type": 1 "probe_type": 1
}, },
{ {
"name": "sd_cs", "name": "spi_controller/o_spi_mosi",
"width": 1, "width": 1,
"probe_type": 1 "probe_type": 1
}, },
{ {
"name": "spi_miso", "name": "spi_controller/i_spi_miso",
"width": 1,
"probe_type": 1
},
{
"name": "spi_controller/active",
"width": 1, "width": 1,
"probe_type": 1 "probe_type": 1
} }
@@ -192,7 +187,7 @@
}, },
{ {
"name": "la0_clk", "name": "la0_clk",
"net": "clk_50", "net": "clk_2",
"path": [] "path": []
}, },
{ {
@@ -241,123 +236,224 @@
"path": [] "path": []
}, },
{ {
"name": "la0_probe2", "name": "la0_probe2[0]",
"net": "cpu_sync",
"path": []
},
{
"name": "la0_probe3",
"net": "cpu_resb",
"path": []
},
{
"name": "la0_probe4[0]",
"net": "cpu_addr[0]", "net": "cpu_addr[0]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[1]", "name": "la0_probe2[1]",
"net": "cpu_addr[1]", "net": "cpu_addr[1]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[2]", "name": "la0_probe2[2]",
"net": "cpu_addr[2]", "net": "cpu_addr[2]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[3]", "name": "la0_probe2[3]",
"net": "cpu_addr[3]", "net": "cpu_addr[3]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[4]", "name": "la0_probe2[4]",
"net": "cpu_addr[4]", "net": "cpu_addr[4]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[5]", "name": "la0_probe2[5]",
"net": "cpu_addr[5]", "net": "cpu_addr[5]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[6]", "name": "la0_probe2[6]",
"net": "cpu_addr[6]", "net": "cpu_addr[6]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[7]", "name": "la0_probe2[7]",
"net": "cpu_addr[7]", "net": "cpu_addr[7]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[8]", "name": "la0_probe2[8]",
"net": "cpu_addr[8]", "net": "cpu_addr[8]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[9]", "name": "la0_probe2[9]",
"net": "cpu_addr[9]", "net": "cpu_addr[9]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[10]", "name": "la0_probe2[10]",
"net": "cpu_addr[10]", "net": "cpu_addr[10]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[11]", "name": "la0_probe2[11]",
"net": "cpu_addr[11]", "net": "cpu_addr[11]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[12]", "name": "la0_probe2[12]",
"net": "cpu_addr[12]", "net": "cpu_addr[12]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[13]", "name": "la0_probe2[13]",
"net": "cpu_addr[13]", "net": "cpu_addr[13]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[14]", "name": "la0_probe2[14]",
"net": "cpu_addr[14]", "net": "cpu_addr[14]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe4[15]", "name": "la0_probe2[15]",
"net": "cpu_addr[15]", "net": "cpu_addr[15]",
"path": [] "path": []
}, },
{ {
"name": "la0_probe5", "name": "la0_probe3",
"net": "cpu_phi2", "net": "cpu_sync",
"path": [] "path": []
}, },
{ {
"name": "la0_probe6", "name": "la0_probe4",
"net": "spi_clk", "net": "cpu_rdy",
"path": [] "path": []
}, },
{
"name": "la0_probe5[0]",
"net": "r_input_data[0]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[1]",
"net": "r_input_data[1]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[2]",
"net": "r_input_data[2]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[3]",
"net": "r_input_data[3]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[4]",
"net": "r_input_data[4]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[5]",
"net": "r_input_data[5]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[6]",
"net": "r_input_data[6]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe5[7]",
"net": "r_input_data[7]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[0]",
"net": "r_output_data[0]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[1]",
"net": "r_output_data[1]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[2]",
"net": "r_output_data[2]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[3]",
"net": "r_output_data[3]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[4]",
"net": "r_output_data[4]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[5]",
"net": "r_output_data[5]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[6]",
"net": "r_output_data[6]",
"path": [
"spi_controller"
]
},
{
"name": "la0_probe6[7]",
"net": "r_output_data[7]",
"path": [
"spi_controller"
]
},
{ {
"name": "la0_probe7", "name": "la0_probe7",
"net": "spi_mosi", "net": "o_spi_clk",
"path": [] "path": [
"spi_controller"
]
}, },
{ {
"name": "la0_probe8", "name": "la0_probe8",
"net": "sd_cs", "net": "o_spi_mosi",
"path": [] "path": [
"spi_controller"
]
}, },
{ {
"name": "la0_probe9", "name": "la0_probe9",
"net": "spi_miso", "net": "i_spi_miso",
"path": []
},
{
"name": "la0_probe10",
"net": "active",
"path": [ "path": [
"spi_controller" "spi_controller"
] ]
@@ -380,7 +476,7 @@
{ {
"name": "cpu_data_in", "name": "cpu_data_in",
"width": 8, "width": 8,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [], "path": [],
@@ -390,23 +486,7 @@
{ {
"name": "cpu_rwb", "name": "cpu_rwb",
"width": 1, "width": 1,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER",
"child": [],
"path": []
},
{
"name": "cpu_sync",
"width": 1,
"clk_domain": "clk_50",
"selected_probe_type": "DATA AND TRIGGER",
"child": [],
"path": []
},
{
"name": "cpu_resb",
"width": 1,
"clk_domain": "clk_50",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [] "path": []
@@ -414,7 +494,7 @@
{ {
"name": "cpu_addr", "name": "cpu_addr",
"width": 16, "width": 16,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [], "path": [],
@@ -422,49 +502,69 @@
"net_idx_right": 0 "net_idx_right": 0
}, },
{ {
"name": "cpu_phi2", "name": "cpu_sync",
"width": 1, "width": 1,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [] "path": []
}, },
{ {
"name": "spi_clk", "name": "cpu_rdy",
"width": 1, "width": 1,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [] "path": []
}, },
{ {
"name": "spi_mosi", "name": "r_input_data",
"width": 1, "width": 8,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [] "path": [
"spi_controller"
],
"net_idx_left": 7,
"net_idx_right": 0
}, },
{ {
"name": "sd_cs", "name": "r_output_data",
"width": 1, "width": 8,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [] "path": [
"spi_controller"
],
"net_idx_left": 7,
"net_idx_right": 0
}, },
{ {
"name": "spi_miso", "name": "o_spi_clk",
"width": 1, "width": 1,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [] "path": [
"spi_controller"
]
}, },
{ {
"name": "active", "name": "o_spi_mosi",
"width": 1, "width": 1,
"clk_domain": "clk_50", "clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER",
"child": [],
"path": [
"spi_controller"
]
},
{
"name": "i_spi_miso",
"width": 1,
"clk_domain": "clk_2",
"selected_probe_type": "DATA AND TRIGGER", "selected_probe_type": "DATA AND TRIGGER",
"child": [], "child": [],
"path": [ "path": [

490
hw/efinix_fpga/init_hex.mem
View File

@@ -1,253 +1,253 @@
@00000000 @00000000
00 80 4C 00 00 8D 13 02 8E 14 02 8D 1A 02 8E 1B 00 80 4C 00 00 8D 13 02 8E 14 02 8D 1A 02 8E 1B
02 88 B9 FF FF 8D 24 02 88 B9 FF FF 8D 23 02 8C 02 88 B9 FF FF 8D 24 02 88 B9 FF FF 8D 23 02 8C
26 02 20 FF FF A0 FF D0 E8 60 00 00 0B FE 00 00 26 02 20 FF FF A0 FF D0 E8 60 00 00 70 FD 00 00
00 00 A2 FF 9A D8 A9 00 85 00 A9 80 85 01 20 83 00 00 A2 FF 9A D8 A9 00 85 00 A9 80 85 01 20 E8
FE 20 3F FB 20 52 F0 58 20 CC F1 6C FC FF 20 33 FD 20 BA FA 20 52 F0 58 20 69 F2 6C FC FF 20 AE
FB 00 A0 00 F0 07 A9 52 A2 F0 4C 05 02 60 AD FF FA 00 A0 00 F0 07 A9 52 A2 F0 4C 05 02 60 AD FF
EF A2 00 60 8D FF EF 60 20 B2 F1 C9 0A D0 05 A9 EF A2 00 60 8D FF EF 60 20 4F F2 C9 0A D0 05 A9
0D 20 B2 F1 60 DA 5A A8 B2 00 AA A9 1B 20 B2 F1 0D 20 4F F2 60 DA 5A A8 B2 00 AA A9 1B 20 4F F2
A9 5B 20 B2 F1 98 20 B2 F1 A9 3B 20 B2 F1 8A 20 A9 5B 20 4F F2 98 20 4F F2 A9 3B 20 4F F2 8A 20
B2 F1 A9 48 20 B2 F1 7A FA 60 DA A9 1B 20 B2 F1 4F F2 A9 48 20 4F F2 7A FA 60 DA A9 1B 20 4F F2
A9 63 20 B2 F1 68 60 40 DA BA 48 E8 E8 BD 00 01 A9 63 20 4F F2 68 60 40 DA BA 48 E8 E8 BD 00 01
29 10 D0 06 68 FA 20 CB F1 40 68 FA 7C BF F0 C5 29 10 D0 06 68 FA 20 68 F2 40 68 FA 7C BF F0 C5
F0 C9 F0 CA F0 20 9A F0 40 40 20 68 F0 40 48 A0 F0 C9 F0 CA F0 20 9A F0 40 40 20 68 F0 40 48 A0
04 B1 00 09 40 20 A2 F1 88 B1 00 20 A2 F1 88 10 04 B1 00 09 40 20 3F F2 88 B1 00 20 3F F2 88 10
F8 68 09 01 20 A2 F1 20 2F FC 60 A2 08 A9 FF 20 F8 68 09 01 20 3F F2 20 AA FB 60 A2 08 A9 FF 20
A2 F1 C9 FF D0 03 CA D0 F4 60 85 08 86 09 20 EB 3F F2 C9 FF D0 03 CA D0 F4 60 85 08 86 09 20 EB
F0 92 08 A9 FF 20 A2 F1 A0 01 91 08 20 1C FC 60 F0 92 08 A9 FF 20 3F F2 A0 01 91 08 20 97 FB 60
AA 20 6A FD A9 FF 20 A2 F1 92 08 E6 08 D0 02 E6 AA 20 E5 FC A9 FF 20 3F F2 92 08 E6 08 D0 02 E6
09 CA D0 F0 60 85 08 86 09 20 EB F0 C9 02 B0 12 09 CA D0 F0 60 85 08 86 09 20 EB F0 C9 02 B0 12
E6 08 D0 02 E6 08 A5 08 A6 09 20 97 FD A9 04 20 E6 08 D0 02 E6 08 A5 08 A6 09 20 12 FD A9 04 20
10 F1 60 48 A9 FF 20 A2 F1 A9 00 20 96 F1 A9 FF 10 F1 60 48 A9 FF 20 3F F2 A9 00 20 33 F2 A9 FF
20 A2 F1 68 20 CE F0 20 EB F0 A8 A9 FF 20 A2 F1 20 3F F2 68 20 CE F0 20 EB F0 A8 A9 FF 20 3F F2
A9 00 20 9C F1 A9 FF 20 A2 F1 98 A2 00 60 A9 00 A9 00 20 39 F2 A9 FF 20 3F F2 98 A2 00 60 A9 00
20 9C F1 20 8B F1 A9 FF 20 A2 F1 A9 00 20 9C F1 20 39 F2 20 8B F1 A9 FF 20 3F F2 A9 00 20 39 F2
A2 50 A9 FF 20 A2 F1 CA D0 F8 60 A2 01 A9 C8 3A A2 50 A9 FF 20 3F F2 CA D0 F8 60 A2 01 A9 C8 3A
D0 FD CA D0 F8 60 A9 01 8D DB EF 60 9C DB EF 60 D0 FD CA D0 F8 60 85 0A 86 0B A9 FF 92 0A 20 E5
A9 00 8D DA EF AD DB EF 30 FB AD D9 EF 60 8D E6 FC A5 00 85 0C A5 01 85 0D 20 52 FB A0 00 B1 0C
EF 60 48 8D E6 EF AD E7 EF 89 02 D0 F9 68 60 AD 91 00 C8 B1 0C 91 00 C8 B1 0C 91 00 C8 B1 0C 91
E6 EF A2 00 60 AD E7 EF A2 00 60 60 20 FA FB A2 00 A9 FF 20 3F F2 A9 00 20 33 F2 A9 FF 20 3F F2
00 86 02 86 03 A9 00 20 91 FC 20 E0 FB A9 EA A2 A9 11 A0 04 91 00 A9 00 20 CE F0 20 EB F0 C9 FF
FE 20 A0 FB 20 93 F2 C9 00 20 3E FD D0 03 4C FB F0 3F 85 12 A0 00 A9 FF 20 3F F2 85 11 A5 11 C9
F1 A9 E2 A2 FE 20 A0 FB 4C 87 F2 A9 D8 A2 FE 20 FF D0 05 C8 D0 F0 80 23 A2 02 A0 00 A9 FF 20 3F
A0 FB A9 A6 A2 FE 20 A0 FB A0 05 20 4D FC 20 91 F2 92 08 E6 08 D0 02 E6 09 88 D0 F0 A0 00 CA D0
FC AD 00 02 AE 01 02 20 97 FD A9 0C 20 5E FC 20 EB A9 FF 20 3F F2 A9 FF 20 3F F2 A5 11 92 0A A5
80 F5 A0 07 91 00 A9 CA A2 FE 20 A0 FB A0 07 A2 12 48 A9 FF 20 3F F2 A9 00 20 39 F2 A9 FF 20 3F
00 B1 00 C9 00 20 44 FD D0 03 4C 4D F2 A0 06 A2 F2 68 60 A9 01 8D DB EF 60 9C DB EF 60 A9 00 8D
00 B1 00 C9 FE 20 44 FD F0 03 4C 56 F2 A2 00 A9 DA EF AD DB EF 30 FB AD D9 EF 60 8D E6 EF 60 48
00 D0 03 4C 5A F2 A2 00 A9 01 D0 03 4C 6B F2 AD 8D E6 EF AD E7 EF 89 02 D0 F9 68 60 AD E6 EF A2
00 02 AE 01 02 20 C1 F6 4C 84 F2 A0 06 A2 00 B1 00 60 AD E7 EF A2 00 60 60 20 75 FB A2 00 86 02
00 A2 00 29 F0 20 25 FB D0 03 4C 84 F2 A9 BB A2 86 03 A9 00 20 0C FC 20 5B FB A9 2D A2 FE 20 1B
FE 20 A0 FB 6C 00 02 4C 8A F2 4C 8A F2 A0 0C 20 FB 20 3A F3 C9 00 20 B9 FC D0 03 4C 98 F2 A9 25
0B FB 60 20 07 FC A9 00 20 81 FD 20 6E F1 4C CA A2 FE 20 1B FB 4C 2E F3 A9 1B A2 FE 20 1B FB A0
F2 A0 00 A2 00 18 A9 01 71 00 91 00 A0 00 A2 00 05 20 C8 FB 20 0C FC AD 00 02 AE 01 02 20 12 FD
B1 00 C9 FF 20 44 FD D0 03 4C CA F2 A9 0C A2 FF A9 0C 20 D9 FB 20 96 F1 A0 07 91 00 A0 07 A2 00
20 A0 FB A2 00 A9 01 4C 01 F4 20 05 F4 A0 01 91 B1 00 C9 00 20 BF FC D0 03 4C DC F2 A0 06 A2 00
00 C9 01 20 3E FD D0 C9 A2 00 A9 00 A0 06 20 C5 B1 00 C9 FE 20 BF FC F0 03 4C E5 F2 A2 00 A9 00
FD A0 07 20 44 FC E0 03 D0 02 C9 E8 20 5D FD F0 D0 03 4C E9 F2 A2 00 A9 01 D0 03 4C FA F2 AD 00
03 4C F7 F2 4C 03 F3 A0 06 A2 00 A9 01 20 FB FA 02 AE 01 02 20 3C F6 4C 2B F3 A0 06 A2 00 B1 00
4C E1 F2 A9 01 20 5E FC 20 22 F4 A0 01 A2 00 B1 A2 00 29 F0 20 A0 FA D0 03 4C 16 F3 A9 25 A2 FE
00 C9 01 20 3E FD D0 03 4C 29 F3 A9 02 A2 FF 20 20 1B FB 4C 2B F3 A9 0B A2 FE 20 12 FD A0 08 A2
A0 FB A2 00 A9 01 4C 01 F4 A0 05 A2 00 B1 00 C9 00 B1 00 20 12 FD A0 04 20 E7 FA 6C 00 02 4C 31
AA 20 3E FD D0 03 4C 40 F3 A2 00 A9 01 4C 01 F4 F3 4C 31 F3 A0 0C 20 86 FA 60 20 82 FB A9 00 20
A2 00 A9 00 A0 00 91 00 A0 00 A2 00 B1 00 C9 FF FC FC 20 6E F1 4C 71 F3 A0 00 A2 00 18 A9 01 71
20 44 FD D0 03 4C 66 F3 A9 F2 A2 FE 20 A0 FB A2 00 91 00 A0 00 A2 00 B1 00 C9 FF 20 BF FC D0 03
00 A9 01 4C 01 F4 20 44 F5 A0 01 91 00 A0 01 A2 4C 71 F3 A9 4F A2 FE 20 1B FB A2 00 A9 01 4C A8
00 B1 00 C9 02 20 5D FD D0 03 4C 84 F3 20 61 F5 F4 20 AC F4 A0 01 91 00 C9 01 20 B9 FC D0 C9 A2
A0 01 91 00 A2 00 A9 00 A0 06 20 C5 FD A0 07 20 00 A9 00 A0 06 20 2A FD A0 07 20 BF FB E0 03 D0
44 FC E0 03 D0 02 C9 E8 20 5D FD F0 03 4C A3 F3 02 C9 E8 20 D8 FC F0 03 4C 9E F3 4C AA F3 A0 06
4C AF F3 A0 06 A2 00 A9 01 20 FB FA 4C 8D F3 A0 A2 00 A9 01 20 76 FA 4C 88 F3 A9 01 20 D9 FB 20
00 A2 00 18 A9 01 71 00 91 00 A0 01 A2 00 B1 00 C9 F4 A0 01 A2 00 B1 00 C9 01 20 B9 FC D0 03 4C
C9 00 20 3E FD D0 81 A2 00 A9 00 A0 06 20 C5 FD D0 F3 A9 45 A2 FE 20 1B FB A2 00 A9 01 4C A8 F4
A0 07 20 44 FC E0 03 D0 02 C9 E8 20 5D FD F0 03 A0 05 A2 00 B1 00 C9 AA 20 B9 FC D0 03 4C E7 F3
4C E6 F3 4C F2 F3 A0 06 A2 00 A9 01 20 FB FA 4C A2 00 A9 01 4C A8 F4 A2 00 A9 00 A0 00 91 00 A0
D0 F3 A9 01 20 5E FC 20 CA F4 A2 00 A9 00 4C 01 00 A2 00 B1 00 C9 FF 20 BF FC D0 03 4C 0D F4 A9
F4 20 34 FC 60 A2 00 A9 00 20 81 FD A2 00 86 02 35 A2 FE 20 1B FB A2 00 A9 01 4C A8 F4 20 EB F5
86 03 A9 00 20 91 FC A2 00 A9 94 20 43 F1 4C 21 A0 01 91 00 A0 01 A2 00 B1 00 C9 02 20 D8 FC D0
F4 60 20 97 FD A2 00 A9 FF 20 A2 F1 A2 00 A9 00 03 4C 2B F4 20 08 F6 A0 01 91 00 A2 00 A9 00 A0
20 96 F1 A2 00 A9 FF 20 A2 F1 A2 00 A9 08 20 81 06 20 2A FD A0 07 20 BF FB E0 03 D0 02 C9 E8 20
FD A2 01 A9 00 85 02 A9 00 85 03 A9 AA 20 91 FC D8 FC F0 03 4C 4A F4 4C 56 F4 A0 06 A2 00 A9 01
A2 00 A9 86 20 CE F0 A0 01 20 44 FC 20 25 F1 A2 20 76 FA 4C 34 F4 A0 00 A2 00 18 A9 01 71 00 91
00 A9 FF 20 A2 F1 A2 00 A9 00 20 9C F1 A2 00 A9 00 A0 01 A2 00 B1 00 C9 00 20 B9 FC D0 81 A2 00
FF 20 A2 F1 20 1C FC 60 20 97 FD A2 00 A9 FF 20 A9 00 A0 06 20 2A FD A0 07 20 BF FB E0 03 D0 02
A2 F1 A2 00 A9 00 20 96 F1 A2 00 A9 FF 20 A2 F1 C9 E8 20 D8 FC F0 03 4C 8D F4 4C 99 F4 A0 06 A2
A2 00 A9 0D 20 81 FD A2 00 86 02 86 03 A9 00 20 00 A9 01 20 76 FA 4C 77 F4 A9 01 20 D9 FB 20 71
91 FC A2 00 A9 00 20 CE F0 A0 01 20 44 FC 20 FA F5 A2 00 A9 00 4C A8 F4 20 AF FB 60 A2 00 A9 00
F0 A2 00 A9 FF 20 A2 F1 A2 00 A9 00 20 9C F1 A2 20 FC FC A2 00 86 02 86 03 A9 00 20 0C FC A2 00
00 A9 FF 20 A2 F1 20 1C FC 60 20 97 FD 20 D7 FB A9 94 20 43 F1 4C C8 F4 60 20 12 FD A2 00 A9 FF
A2 00 A9 FF 20 A2 F1 A2 00 A9 00 20 96 F1 A2 00 20 3F F2 A2 00 A9 00 20 33 F2 A2 00 A9 FF 20 3F
A9 FF 20 A2 F1 A0 00 91 00 A0 00 A2 00 B1 00 C9 F2 A2 00 A9 08 20 FC FC A2 01 A9 00 85 02 A9 00
FF 20 3E FD D0 03 4C 0A F5 4C FC F4 A2 00 A9 FF 85 03 A9 AA 20 0C FC A2 00 A9 86 20 CE F0 A0 01
20 A2 F1 C9 FF 20 3E FD D0 F2 A2 00 A9 3A 20 81 20 BF FB 20 25 F1 A2 00 A9 FF 20 3F F2 A2 00 A9
FD A2 00 86 02 86 03 A9 00 20 91 FC A2 00 A9 00 00 20 39 F2 A2 00 A9 FF 20 3F F2 20 97 FB 60 20
20 CE F0 A0 02 20 44 FC 20 25 F1 A2 00 A9 FF 20 12 FD A2 00 A9 FF 20 3F F2 A2 00 A9 00 20 33 F2
A2 F1 A2 00 A9 00 20 9C F1 A2 00 A9 FF 20 A2 F1 A2 00 A9 FF 20 3F F2 A2 00 A9 0D 20 FC FC A2 00
20 2A FC 60 A2 00 A9 37 20 81 FD A2 00 86 02 86 86 02 86 03 A9 00 20 0C FC A2 00 A9 00 20 CE F0
03 A9 00 20 91 FC A2 00 A9 00 20 43 F1 4C 60 F5 A0 01 20 BF FB 20 FA F0 A2 00 A9 FF 20 3F F2 A2
60 A2 00 A9 29 20 81 FD A2 00 86 02 A9 40 85 03 00 A9 00 20 39 F2 A2 00 A9 FF 20 3F F2 20 97 FB
A9 00 20 91 FC A2 00 A9 00 20 43 F1 4C 7F F5 60 60 20 12 FD 20 52 FB A2 00 A9 FF 20 3F F2 A2 00
20 97 FD 20 FA FB A0 07 20 44 FC 20 97 FD A2 00 A9 00 20 33 F2 A2 00 A9 FF 20 3F F2 A0 00 91 00
A9 FF A0 00 20 AD FD A2 00 A9 FF 20 A2 F1 A2 00 A0 00 A2 00 B1 00 C9 FF 20 B9 FC D0 03 4C B1 F5
A9 00 20 96 F1 A2 00 A9 FF 20 A2 F1 A2 00 A9 11 4C A3 F5 A2 00 A9 FF 20 3F F2 C9 FF 20 B9 FC D0
20 81 FD A0 0E 20 4D FC 20 91 FC A2 00 A9 00 20 F2 A2 00 A9 3A 20 FC FC A2 00 86 02 86 03 A9 00
CE F0 20 EB F0 A0 05 91 00 A0 05 A2 00 B1 00 C9 20 0C FC A2 00 A9 00 20 CE F0 A0 02 20 BF FB 20
FF 20 3E FD D0 03 4C 88 F6 A2 00 A9 00 A0 02 20 25 F1 A2 00 A9 FF 20 3F F2 A2 00 A9 00 20 39 F2
C5 FD 4C FD F5 A2 00 A9 FF 20 A2 F1 A0 04 91 00 A2 00 A9 FF 20 3F F2 20 A5 FB 60 A2 00 A9 37 20
C9 FF 20 3E FD D0 03 4C FD F5 4C 11 F6 A0 02 A2 FC FC A2 00 86 02 86 03 A9 00 20 0C FC A2 00 A9
00 A9 01 20 FB FA E0 06 D0 02 C9 1B 20 3E FD D0 00 20 43 F1 4C 07 F6 60 A2 00 A9 29 20 FC FC A2
D4 A0 04 A2 00 B1 00 C9 FE 20 44 FD D0 03 4C 75 00 86 02 A9 40 85 03 A9 00 20 0C FC A2 00 A9 00
F6 A2 00 A9 00 A0 00 20 C5 FD A0 01 20 44 FC E0 20 43 F1 4C 26 F6 60 20 12 FD 20 75 FB A0 03 A2
02 20 5D FD F0 03 4C 3C F6 4C 67 F6 A0 09 20 44 00 B1 00 4C 36 F6 A0 0E 20 86 FA 60 20 12 FD A9
FC 20 97 FD A2 00 A9 FF 48 A0 0A A2 00 A9 01 20 00 20 FC FC 20 5B FB A2 00 A9 00 A0 00 20 2A FD
FB FA 68 20 A2 F1 A0 00 20 AD FD A0 00 A2 00 A9 A0 01 20 BF FB E0 02 20 D8 FC F0 03 4C 62 F6 4C
01 20 FB FA 4C 2A F6 A2 00 A9 FF 20 A2 F1 A2 00 C4 F6 A9 59 A2 FE 20 12 FD A0 06 20 BF FB A0 00
A9 FF 20 A2 F1 A0 07 20 44 FC 20 97 FD A0 06 A2 20 B4 FB 20 12 FD A0 07 A2 00 A9 01 20 76 FA A0
00 B1 00 A0 00 20 AD FD A2 00 A9 FF 20 A2 F1 A2 04 20 E7 FA A0 02 A2 00 B1 00 C9 1F 20 BF FC D0
00 A9 00 20 9C F1 A2 00 A9 FF 20 A2 F1 A0 05 A2 03 4C A6 F6 A9 5D A2 FE 20 1B FB A2 00 A9 00 A0
00 B1 00 4C A6 F6 A0 0E 20 0B FB 60 20 97 FD 20 02 91 00 4C B8 F6 A2 00 A9 20 20 68 F0 A0 02 A2
FA FB A0 03 A2 00 B1 00 4C BB F6 A0 0E 20 0B FB 00 18 A9 01 71 00 91 00 A0 00 A2 00 A9 01 20 76
60 20 97 FD A9 00 20 81 FD 20 E0 FB A2 00 A9 00 FA 4C 50 F6 A9 5D A2 FE 20 1B FB 20 AA FB 60 A0
A0 00 20 C5 FD A0 01 20 44 FC E0 02 20 5D FD F0 00 B1 16 E6 16 D0 02 E6 17 60 AD 3D 02 8D 38 02
03 4C E7 F6 4C 49 F7 A9 16 A2 FF 20 97 FD A0 06 20 7B F7 A9 38 A2 02 20 12 FD 20 F3 FC 4C 02 02
20 44 FC A0 00 20 39 FC 20 97 FD A0 07 A2 00 A9 A5 14 38 E9 02 85 14 B0 02 C6 15 60 AD 42 02 D0
01 20 FB FA A0 04 20 6C FB A0 02 A2 00 B1 00 C9 11 20 19 F7 4C 99 FA AD 42 02 D0 06 20 19 F7 4C
1F 20 44 FD D0 03 4C 2B F7 A9 1A A2 FF 20 A0 FB 93 FA 20 19 F7 85 02 86 03 20 F0 F6 A0 01 B1 14
A2 00 A9 00 A0 02 91 00 4C 3D F7 A2 00 A9 20 20 AA 88 B1 14 60 A0 00 84 08 84 09 B1 16 38 E9 30
68 F0 A0 02 A2 00 18 A9 01 71 00 91 00 A0 00 A2 90 2C C9 0A B0 28 20 D3 F6 48 A5 08 A6 09 06 08
00 A9 01 20 FB FA 4C D5 F6 A9 1A A2 FF 20 A0 FB 26 09 06 08 26 09 65 08 85 08 8A 65 09 85 09 06
20 2F FC 60 A0 00 B1 16 E6 16 D0 02 E6 17 60 AD 08 26 09 68 65 08 85 08 90 D1 E6 09 B0 CD A5 08
3D 02 8D 38 02 20 00 F8 A9 38 A2 02 20 97 FD 20 A6 09 60 AC 44 02 EE 44 02 99 45 02 60 A9 45 A2
78 FD 4C 02 02 A5 14 38 E9 02 85 14 B0 02 C6 15 02 18 6D 44 02 90 01 E8 4C 12 FD A5 18 A6 19 4C
60 AD 42 02 D0 11 20 9E F7 4C 1E FB AD 42 02 D0 12 FD 20 DA F6 EE 3E 02 D0 F8 EE 3F 02 D0 F3 60
06 20 9E F7 4C 18 FB 20 9E F7 85 02 86 03 20 75 20 7B F7 AD 59 02 AE 5A 02 20 12 FD AD 5B 02 AE
F7 A0 01 B1 14 AA 88 B1 14 60 A0 00 84 08 84 09 5C 02 20 12 FD 4C 02 02 84 08 20 0C FC 20 6D F7
B1 16 38 E9 30 90 2C C9 0A B0 28 20 58 F7 48 A5 A5 08 4C 3C FC 84 08 20 0C FC 20 6D F7 A5 08 4C
08 A6 09 06 08 26 09 06 08 26 09 65 08 85 08 8A 7D FC 48 A0 05 B9 14 00 99 32 02 88 10 F7 68 85
65 09 85 09 06 08 26 09 68 65 08 85 08 90 D1 E6 14 86 15 20 8F FB 85 16 86 17 20 8F FB 85 18 86
09 B0 CD A5 08 A6 09 60 AC 44 02 EE 44 02 99 45 19 A9 00 A8 91 18 C8 91 18 C8 B1 18 8D 03 02 C8
02 60 A9 45 A2 02 18 6D 44 02 90 01 E8 4C 97 FD B1 18 8D 04 02 A5 16 85 08 A5 17 85 09 A0 00 B1
A5 18 A6 19 4C 97 FD 20 5F F7 EE 3E 02 D0 F8 EE 16 F0 0B C9 25 F0 07 C8 D0 F5 E6 17 D0 F1 98 18
3F 02 D0 F3 60 20 00 F8 AD 59 02 AE 5A 02 20 97 65 16 85 16 90 02 E6 17 38 E5 08 85 0A A5 17 E5
FD AD 5B 02 AE 5C 02 20 97 FD 4C 02 02 84 08 20 09 85 0B 05 0A F0 25 20 75 FB A0 05 A5 19 91 00
91 FC 20 F2 F7 A5 08 4C C1 FC 84 08 20 91 FC 20 88 A5 18 91 00 88 A5 09 91 00 88 A5 08 91 00 88
F2 F7 A5 08 4C 02 FD 48 A0 05 B9 14 00 99 32 02 A5 0B 91 00 88 A5 0A 91 00 20 02 02 20 CF F6 AA
88 10 F7 68 85 14 86 15 20 14 FC 85 16 86 17 20 D0 0B A2 05 BD 32 02 95 14 CA 10 F8 60 C9 25 D0
14 FC 85 18 86 19 A9 00 A8 91 18 C8 91 18 C8 B1 09 B1 16 C9 25 D0 09 20 D3 F6 20 DD F6 4C F5 F7
18 8D 03 02 C8 B1 18 8D 04 02 A5 16 85 08 A5 17 A9 00 A2 0B 9D 39 02 CA 10 FA B1 16 C9 2D D0 05
85 09 A0 00 B1 16 F0 0B C9 25 F0 07 C8 D0 F5 E6 8E 39 02 F0 19 C9 2B D0 05 8E 3A 02 F0 10 C9 20
17 D0 F1 98 18 65 16 85 16 90 02 E6 17 38 E5 08 D0 05 8E 3B 02 F0 07 C9 23 D0 09 8E 3C 02 20 D3
85 0A A5 17 E5 09 85 0B 05 0A F0 25 20 FA FB A0 F6 4C 7A F8 A2 20 C9 30 D0 06 AA 20 D3 F6 B1 16
05 A5 19 91 00 88 A5 18 91 00 88 A5 09 91 00 88 8E 3D 02 C9 2A D0 09 20 D3 F6 20 19 F7 4C C3 F8
A5 08 91 00 88 A5 0B 91 00 88 A5 0A 91 00 20 02 20 25 F7 8D 3E 02 8E 3F 02 8C 40 02 8C 41 02 B1
02 20 54 F7 AA D0 0B A2 05 BD 32 02 95 14 CA 10 16 C9 2E D0 1B 20 D3 F6 B1 16 C9 2A D0 09 20 D3
F8 60 C9 25 D0 09 B1 16 C9 25 D0 09 20 58 F7 20 F6 20 19 F7 4C EA F8 20 25 F7 8D 40 02 8E 41 02
62 F7 4C 7A F8 A9 00 A2 0B 9D 39 02 CA 10 FA B1 B1 16 C9 7A F0 19 C9 68 F0 15 C9 74 F0 11 C9 6A
16 C9 2D D0 05 8E 39 02 F0 19 C9 2B D0 05 8E 3A F0 08 C9 4C F0 04 C9 6C D0 0B A9 FF 8D 42 02 20
02 F0 10 C9 20 D0 05 8E 3B 02 F0 07 C9 23 D0 09 D3 F6 4C F0 F8 8C 44 02 A2 45 8E 59 02 A2 02 8E
8E 3C 02 20 58 F7 4C FF F8 A2 20 C9 30 D0 06 AA 5A 02 20 D3 F6 C9 63 D0 0E 20 19 F7 8D 45 02 A9
20 58 F7 B1 16 8E 3D 02 C9 2A D0 09 20 58 F7 20 00 8D 46 02 4C 14 FA C9 64 F0 04 C9 69 D0 2D A2
9E F7 4C 48 F9 20 AA F7 8D 3E 02 8E 3F 02 8C 40 00 AD 3B 02 F0 02 A2 20 AD 3A 02 F0 02 A2 2B 8E
02 8C 41 02 B1 16 C9 2E D0 1B 20 58 F7 B1 16 C9 43 02 20 07 F7 A4 03 30 0B AC 43 02 F0 06 8C 45
2A D0 09 20 58 F7 20 9E F7 4C 6F F9 20 AA F7 8D 02 EE 44 02 A0 0A 20 A8 F7 4C 14 FA C9 6E D0 15
40 02 8E 41 02 B1 16 C9 7A F0 19 C9 68 F0 15 C9 20 19 F7 85 08 86 09 A0 00 B1 18 91 08 C8 B1 18
74 F0 11 C9 6A F0 08 C9 4C F0 04 C9 6C D0 0B A9 91 08 4C F5 F7 C9 6F D0 27 20 07 F7 AC 3C 02 F0
FF 8D 42 02 20 58 F7 4C 75 F9 8C 44 02 A2 45 8E 17 48 86 10 05 10 05 02 05 03 0D 40 02 0D 41 02
59 02 A2 02 8E 5A 02 20 58 F7 C9 63 D0 0E 20 9E F0 06 A9 30 20 63 F7 68 A0 08 20 A8 F7 4C 14 FA
F7 8D 45 02 A9 00 8D 46 02 4C 99 FA C9 64 F0 04 C9 70 D0 0D A2 00 8E 42 02 E8 8E 3C 02 A9 78 D0
C9 69 D0 2D A2 00 AD 3B 02 F0 02 A2 20 AD 3A 02 27 C9 73 D0 0C 20 19 F7 8D 59 02 8E 5A 02 4C 14
F0 02 A2 2B 8E 43 02 20 8C F7 A4 03 30 0B AC 43 FA C9 75 D0 0B 20 FC F6 A0 0A 20 B5 F7 4C 14 FA
02 F0 06 8C 45 02 EE 44 02 A0 0A 20 2D F8 4C 99 C9 78 F0 04 C9 58 D0 29 48 AD 3C 02 F0 0A A9 30
FA C9 6E D0 15 20 9E F7 85 08 86 09 A0 00 B1 18 20 63 F7 A9 58 20 63 F7 20 FC F6 A0 10 20 B5 F7
91 08 C8 B1 18 91 08 4C 7A F8 C9 6F D0 27 20 8C 68 C9 78 D0 09 AD 59 02 AE 5A 02 20 49 FD 4C 14
F7 AC 3C 02 F0 17 48 86 10 05 10 05 02 05 03 0D FA 4C F5 F7 AD 59 02 AE 5A 02 20 33 FD 8D 5B 02
40 02 0D 41 02 F0 06 A9 30 20 E8 F7 68 A0 08 20 8E 5C 02 AD 40 02 0D 41 02 F0 15 AE 40 02 EC 5B
2D F8 4C 99 FA C9 70 D0 0D A2 00 8E 42 02 E8 8E 02 AD 41 02 A8 ED 5C 02 B0 06 8E 5B 02 8C 5C 02
3C 02 A9 78 D0 27 C9 73 D0 0C 20 9E F7 8D 59 02 38 AD 3E 02 ED 5B 02 AA AD 3F 02 ED 5C 02 B0 03
8E 5A 02 4C 99 FA C9 75 D0 0B 20 81 F7 A0 0A 20 A9 00 AA 49 FF 8D 3F 02 8A 49 FF 8D 3E 02 AD 39
3A F8 4C 99 FA C9 78 F0 04 C9 58 D0 29 48 AD 3C 02 D0 03 20 85 F7 20 90 F7 AD 39 02 F0 03 20 85
02 F0 0A A9 30 20 E8 F7 A9 58 20 E8 F7 20 81 F7 F7 4C F5 F7 A0 00 18 71 00 91 00 48 C8 8A 71 00
A0 10 20 3A F8 68 C9 78 D0 09 AD 59 02 AE 5A 02 91 00 AA 68 60 C8 48 18 98 65 00 85 00 90 02 E6
20 E4 FD 4C 99 FA 4C 7A F8 AD 59 02 AE 5A 02 20 01 68 60 A0 FF E0 80 B0 02 A0 00 84 02 84 03 60
CE FD 8D 5B 02 8E 5C 02 AD 40 02 0D 41 02 F0 15 E0 00 D0 06 AA D0 03 A9 01 60 A2 00 8A 60 A0 00
AE 40 02 EC 5B 02 AD 41 02 A8 ED 5C 02 B0 06 8E F0 07 A9 52 A2 F0 4C 05 02 60 A9 00 85 08 A9 F0
5B 02 8C 5C 02 38 AD 3E 02 ED 5B 02 AA AD 3F 02 85 09 A9 00 85 0A A9 02 85 0B A2 CD A9 FF 85 10
ED 5C 02 B0 03 A9 00 AA 49 FF 8D 3F 02 8A 49 FF A0 00 E8 F0 0D B1 08 91 0A C8 D0 F6 E6 09 E6 0B
8D 3E 02 AD 39 02 D0 03 20 0A F8 20 15 F8 AD 39 D0 F0 E6 10 D0 EF 60 8C 5D 02 88 88 98 18 65 00
02 F0 03 20 0A F8 4C 7A F8 A0 00 18 71 00 91 00 85 08 A6 01 90 01 E8 86 09 A0 01 B1 08 AA 88 B1
48 C8 8A 71 00 91 00 AA 68 60 C8 48 18 98 65 00 08 20 12 FD A5 08 A6 09 20 B8 FD AC 5D 02 4C 86
85 00 90 02 E6 01 68 60 A0 FF E0 80 B0 02 A0 00 FA 85 08 86 09 20 75 F0 4C 1F FB 85 08 86 09 A0
84 02 84 03 60 E0 00 D0 06 AA D0 03 A9 01 60 A2 00 B1 08 F0 0E C8 84 10 20 68 F0 A4 10 D0 F2 E6
00 8A 60 A0 00 F0 07 A9 52 A2 F0 4C 05 02 60 A9 09 D0 EE 60 E0 00 D0 15 4A AA BD 87 FE 90 05 4A
00 85 08 A9 F0 85 09 A9 00 85 0A A9 02 85 0B A2 4A 4A 4A 18 29 0F AA BD 7C FE A2 00 60 38 A9 00
CD A9 FF 85 10 A0 00 E8 F0 0D B1 08 91 0A C8 D0 AA 60 A4 00 D0 02 C6 01 C6 00 60 A5 00 38 E9 02
F6 E6 09 E6 0B D0 F0 E6 10 D0 EF 60 8C 5D 02 88 85 00 90 01 60 C6 01 60 A5 00 38 E9 04 85 00 90
88 98 18 65 00 85 08 A6 01 90 01 E8 86 09 A0 01 01 60 C6 01 60 A5 00 38 E9 06 85 00 90 01 60 C6
B1 08 AA 88 B1 08 20 97 FD A5 08 A6 09 20 53 FE 01 60 A5 00 38 E9 07 85 00 90 01 60 C6 01 60 A0
AC 5D 02 4C 0B FB 85 08 86 09 20 75 F0 4C A4 FB 01 B1 00 AA 88 B1 00 E6 00 F0 05 E6 00 F0 03 60
85 08 86 09 A0 00 B1 08 F0 0E C8 84 10 20 68 F0 E6 00 E6 01 60 A0 03 4C 86 FA A0 05 4C 86 FA A0
A4 10 D0 F2 E6 09 D0 EE 60 E0 00 D0 15 4A AA BD 08 4C 86 FA 85 08 86 09 A2 00 B1 08 60 A0 01 B1
44 FF 90 05 4A 4A 4A 4A 18 29 0F AA BD 39 FF A2 00 AA 88 B1 00 60 A0 03 B1 00 85 03 88 B1 00 85
00 60 38 A9 00 AA 60 A4 00 D0 02 C6 01 C6 00 60 02 88 B1 00 AA 88 B1 00 60 A2 00 18 65 00 48 8A
A5 00 38 E9 02 85 00 90 01 60 C6 01 60 A5 00 38 65 01 AA 68 60 18 49 FF 69 01 48 8A 49 FF 69 00
E9 04 85 00 90 01 60 C6 01 60 A5 00 38 E9 06 85 AA A5 02 49 FF 69 00 85 02 A5 03 49 FF 69 00 85
00 90 01 60 C6 01 60 A5 00 38 E9 07 85 00 90 01 03 68 60 A9 00 AA A0 00 84 02 84 03 48 20 68 FB
60 C6 01 60 A0 01 B1 00 AA 88 B1 00 E6 00 F0 05 A0 03 A5 03 91 00 88 A5 02 91 00 88 8A 91 00 68
E6 00 F0 03 60 E6 00 E6 01 60 A0 03 4C 0B FB A0 88 91 00 60 85 10 20 8F FB 85 0A 86 0B 85 0C 86
05 4C 0B FB A0 08 4C 0B FB 85 08 86 09 A2 00 B1 0D 20 E5 FC 20 8F FB 85 02 86 03 60 20 24 FC A6
08 60 A0 01 B1 00 AA 88 B1 00 60 A0 03 B1 00 85 03 A4 10 C0 0A D0 39 A5 02 05 09 05 08 D0 11 E0
03 88 B1 00 85 02 88 B1 00 AA 88 B1 00 60 A2 00 80 D0 0D A0 0B B9 70 FE 91 0A 88 10 F8 4C B4 FC
18 65 00 48 8A 65 01 AA 68 60 18 49 FF 69 01 48 8A 10 1D A9 2D A0 00 91 0A E6 0A D0 02 E6 0B A5
8A 49 FF 69 00 AA A5 02 49 FF 69 00 85 02 A5 03 08 A6 09 20 E5 FB 85 08 86 09 4C 80 FC 20 24 FC
49 FF 69 00 85 03 68 60 A9 00 AA A0 00 84 02 84 A9 00 48 A0 20 A9 00 06 08 26 09 26 02 26 03 2A
03 48 20 ED FB A0 03 A5 03 91 00 88 A5 02 91 00 C5 10 90 04 E5 10 E6 08 88 D0 EC A8 B9 60 FE 48
88 8A 91 00 68 88 91 00 60 85 10 20 14 FC 85 0A A5 08 05 09 05 02 05 03 D0 D9 A0 00 68 91 0A F0
86 0B 85 0C 86 0D 20 6A FD 20 14 FC 85 02 86 03 03 C8 D0 F8 A5 0C A6 0D 60 D0 06 A2 00 8A 60 D0
60 20 A9 FC A6 03 A4 10 C0 0A D0 39 A5 02 05 09 FA A2 00 A9 01 60 F0 F9 30 F7 A2 00 8A 60 F0 02
05 08 D0 11 E0 80 D0 0D A0 0B B9 2D FF 91 0A 88 10 EF A2 00 8A 60 F0 E9 90 E7 A2 00 8A 60 F0 DB
10 F8 4C 39 FD 8A 10 1D A9 2D A0 00 91 0A E6 0A A2 00 8A 2A 60 A0 01 B1 00 85 09 88 B1 00 85 08
D0 02 E6 0B A5 08 A6 09 20 6A FC 85 08 86 09 4C 4C 97 FB A9 01 4C 10 FD A0 00 B1 00 A4 00 F0 07
05 FD 20 A9 FC A9 00 48 A0 20 A9 00 06 08 26 09 C6 00 A0 00 91 00 60 C6 01 C6 00 91 00 60 A9 00
26 02 26 03 2A C5 10 90 04 E5 10 E6 08 88 D0 EC A2 00 48 A5 00 38 E9 02 85 00 B0 02 C6 01 A0 01
A8 B9 1D FF 48 A5 08 05 09 05 02 05 03 D0 D9 A0 8A 91 00 68 88 91 00 60 A0 00 91 00 C8 48 8A 91
00 68 91 0A F0 03 C8 D0 F8 A5 0C A6 0D 60 D0 06 00 68 60 85 0A 86 0B A2 00 A0 00 B1 0A F0 08 C8
A2 00 8A 60 D0 FA A2 00 A9 01 60 F0 F9 30 F7 A2 D0 F9 E6 0B E8 D0 F4 98 60 85 08 86 09 85 0A 86
00 8A 60 F0 02 10 EF A2 00 8A 60 F0 E9 90 E7 A2 0B A0 00 B1 08 F0 14 20 38 FB 29 02 F0 06 B1 08
00 8A 60 F0 DB A2 00 8A 2A 60 A0 01 B1 00 85 09 69 20 91 08 C8 D0 EC E6 09 D0 E8 A5 0A A6 0B 60
88 B1 00 85 08 4C 1C FC A9 01 4C 95 FD A0 00 B1 20 8F FB 85 0A 86 0B E8 8E 31 02 AA E8 8E 30 02
00 A4 00 F0 07 C6 00 A0 00 91 00 60 C6 01 C6 00 20 E5 FC 20 8F FB 85 0C 86 0D A0 00 84 10 B1 0C
91 00 60 A9 00 A2 00 48 A5 00 38 E9 02 85 00 B0 18 65 0A 91 0C C8 B1 0C 65 0B 91 0C CE 30 02 F0
02 C6 01 A0 01 8A 91 00 68 88 91 00 60 48 84 10 11 A4 10 B1 08 C8 D0 02 E6 09 84 10 20 68 F0 4C
A0 01 B1 00 85 09 88 B1 00 85 08 A4 10 68 91 08 9C FD CE 31 02 D0 EA 60 85 08 86 09 A9 00 8D 2A
4C 1C FC A0 00 91 00 C8 48 8A 91 00 68 60 85 0A 02 8D 2B 02 A0 01 B1 00 AA 88 B1 00 20 12 FD A0
86 0B A2 00 A0 00 B1 0A F0 08 C8 D0 F9 E6 0B E8 02 A9 2A 91 00 C8 A9 02 91 00 A5 08 A6 09 20 C2
D0 F4 98 60 85 08 86 09 85 0A 86 0B A0 00 B1 08 F7 AD 2A 02 AE 2B 02 60 A9 32 85 08 A9 02 85 09
F0 14 20 BD FB 29 02 F0 06 B1 08 69 20 91 08 C8 A9 00 A8 A2 00 F0 0A 91 08 C8 D0 FB E6 09 CA D0
D0 EC E6 09 D0 E8 A5 0A A6 0B 60 20 14 FC 85 0A F6 C0 2C F0 05 91 08 C8 D0 F7 60 62 61 64 20 74
86 0B E8 8E 31 02 AA E8 8E 30 02 20 6A FD 20 14 6F 6B 65 6E 3A 20 25 78 0D 0A 00 53 75 63 63 65
FC 85 0C 86 0D A0 00 84 10 B1 0C 18 65 0A 91 0C 73 73 0D 0A 00 45 72 72 6F 72 0D 0A 00 53 74 61
C8 B1 0C 65 0B 91 0C CE 30 02 F0 11 A4 10 B1 08 72 74 0D 0A 00 6F 70 5F 63 6F 6E 64 20 65 72 72
C8 D0 02 E6 09 84 10 20 68 F0 4C 37 FE CE 31 02 6F 72 0D 0A 00 49 46 20 43 6F 6E 64 0D 0A 00 47
D0 EA 60 85 08 86 09 A9 00 8D 2A 02 8D 2B 02 A0 6F 20 49 44 4C 45 0D 0A 00 25 32 78 00 0D 0A 00
01 B1 00 AA 88 B1 00 20 97 FD A0 02 A9 2A 91 00 30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46
C8 A9 02 91 00 A5 08 A6 09 20 47 F8 AD 2A 02 AE 2D 32 31 34 37 34 38 33 36 34 38 00 00 01 02 0C
2B 02 60 A9 32 85 08 A9 02 85 09 A9 00 A8 A2 00 09 0A 10 40 50 A0 D0 66 66 66 66 A6 88 88 66 66
F0 0A 91 08 C8 D0 FB E6 09 CA D0 F6 C0 2C F0 05 66 66 66 66 66 66 66 09 00 00 00 00 00 00 00 33
91 08 C8 D0 F7 60 0D 0A 52 65 61 64 69 6E 67 20 33 33 33 33 00 00 00 50 55 55 25 22 22 22 22 22
73 65 63 74 6F 72 3A 20 30 78 00 45 72 72 6F 72 22 22 22 22 02 00 00 40 44 44 14 11 11 11 11 11
20 74 6F 6B 65 6E 3A 0D 0A 00 0D 0A 52 65 73 70 11 11 11 11 01 00 70 00 00 00 00 00 00 00 00 00
6F 6E 73 65 3A 0D 0A 00 53 75 63 63 65 73 73 0D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0A 00 45 72 72 6F 72 0D 0A 00 53 74 61 72 74 0D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0A 00 6F 70 5F 63 6F 6E 64 20 65 72 72 6F 72 0D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0A 00 49 46 20 43 6F 6E 64 0D 0A 00 47 6F 20 49 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
44 4C 45 0D 0A 00 25 32 78 00 0D 0A 00 30 31 32 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
33 34 35 36 37 38 39 41 42 43 44 45 46 2D 32 31 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
34 37 34 38 33 36 34 38 00 00 01 02 0C 09 0A 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40 50 A0 D0 66 66 66 66 A6 88 88 66 66 66 66 66 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
66 66 66 66 09 00 00 00 00 00 00 00 33 33 33 33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
33 00 00 00 50 55 55 25 22 22 22 22 22 22 22 22 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
22 02 00 00 40 44 44 14 11 11 11 11 11 11 11 11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
11 01 00 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

4
hw/efinix_fpga/super6502.xml
View File

@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<efx:project name="super6502" description="" last_change_date="Sun August 6 2023 21:00:00" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd"> <efx:project name="super6502" description="" last_change_date="Tue August 8 2023 19:25:59" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
<efx:device_info> <efx:device_info>
<efx:family name="Trion"/> <efx:family name="Trion"/>
<efx:device name="T20F256"/> <efx:device name="T20F256"/>
@@ -100,7 +100,7 @@
</efx:bitstream_generation> </efx:bitstream_generation>
<efx:debugger> <efx:debugger>
<efx:param name="work_dir" value="work_dbg" value_type="e_string"/> <efx:param name="work_dir" value="work_dbg" value_type="e_string"/>
<efx:param name="auto_instantiation" value="on" value_type="e_bool"/> <efx:param name="auto_instantiation" value="off" value_type="e_bool"/>
<efx:param name="profile" value="debug_profile.wizard.json" value_type="e_string"/> <efx:param name="profile" value="debug_profile.wizard.json" value_type="e_string"/>
</efx:debugger> </efx:debugger>
</efx:project> </efx:project>

82
sw/bios/devices/sd_card.c
View File

@@ -276,56 +276,58 @@ void SD_sendStatus(uint8_t *res)
token = 0x0X - Data error token = 0x0X - Data error
token = 0xFF - timeout token = 0xFF - timeout
*******************************************************************************/ *******************************************************************************/
uint8_t SD_readSingleBlock(uint32_t addr, uint8_t *buf, uint8_t *token) // uint8_t SD_readSingleBlock(uint32_t addr, uint8_t *buf, uint8_t *token)
{ // {
uint8_t res1, read; // uint8_t res1, read;
uint16_t readAttempts; // uint16_t readAttempts;
uint16_t i; // uint16_t i;
// set token to none // // set token to none
*token = 0xFF; // *token = 0xFF;
// assert chip select // // assert chip select
spi_exchange(0xFF); // spi_exchange(0xFF);
spi_select(0); // spi_select(0);
spi_exchange(0xFF); // spi_exchange(0xFF);
// send CMD17 // // send CMD17
SD_command(CMD17, addr, CMD17_CRC); // SD_command(CMD17, addr, CMD17_CRC);
// read R1 // // read R1
res1 = SD_readRes1(); // res1 = SD_readRes1();
// if response received from card // // if response received from card
if(res1 != 0xFF) // if(res1 != 0xFF)
{ // {
// wait for a response token (timeout = 100ms) // // wait for a response token (timeout = 100ms)
readAttempts = 0; // readAttempts = 0;
while(++readAttempts != SD_MAX_READ_ATTEMPTS) // while(++readAttempts != SD_MAX_READ_ATTEMPTS)
if((read = spi_exchange(0xFF)) != 0xFF) break; // if((read = spi_exchange(0xFF)) != 0xFF) break;
// if response token is 0xFE // cprintf("read attempts: %d\r\n", readAttempts);
if(read == SD_START_TOKEN)
{
// read 512 byte block
for(i = 0; i < SD_BLOCK_LEN; i++) *buf++ = spi_exchange(0xFF);
// read 16-bit CRC // // if response token is 0xFE
spi_exchange(0xFF); // if(read == SD_START_TOKEN)
spi_exchange(0xFF); // {
} // // read 512 byte block
// for(i = 0; i < SD_BLOCK_LEN; i++) *buf++ = spi_exchange(0xFF);
// set token to card response // // read 16-bit CRC
*token = read; // spi_exchange(0xFF);
} // spi_exchange(0xFF);
// }
// deassert chip select // // set token to card response
spi_exchange(0xFF); // *token = read;
spi_deselect(0); // }
spi_exchange(0xFF);
return res1; // // deassert chip select
} // spi_exchange(0xFF);
// spi_deselect(0);
// spi_exchange(0xFF);
// return res1;
// }
#define SD_MAX_WRITE_ATTEMPTS 3907 #define SD_MAX_WRITE_ATTEMPTS 3907

117
sw/bios/devices/sd_card_asm.s
View File

@@ -6,8 +6,9 @@
.export _SD_readBytes .export _SD_readBytes
.export _SD_powerUpSeq .export _SD_powerUpSeq
.export _res1_cmd .export _res1_cmd
.export _SD_readSingleBlock
.importzp sp, ptr1 .importzp sp, ptr1, ptr2, ptr3, ptr4, tmp1, tmp2, tmp3
.autoimport on .autoimport on
@@ -27,7 +28,7 @@
dey dey
arg_loop: ; send ARG arg_loop: ; send ARG
lda (sp),y lda (sp),y ; is this sending only 3?
jsr _spi_exchange jsr _spi_exchange
dey dey
bpl arg_loop bpl arg_loop
@@ -188,3 +189,115 @@ read:
bne @L1 ; 3 bne @L1 ; 3
rts rts
.endproc .endproc
; ;uint8_t SD_readSingleBlock(uint32_t addr, uint8_t *buf, uint8_t *token)
.proc _SD_readSingleBlock: near
; token address in a/x
; buf address next on stack
; sd address above that
; ptr2 = *token
sta ptr2
stx ptr2 + 1
lda #$ff
sta (ptr2)
; ptr1 = *buf
jsr popptr1
; 4 bytes on stack are addr
; Move addr down on the stack
lda sp
sta ptr3
lda sp + 1
sta ptr3 + 1
; find a way to do this in a loop?
jsr decsp1
ldy #$0
lda (ptr3),y
sta (sp),y
iny
lda (ptr3),y
sta (sp),y
iny
lda (ptr3),y
sta (sp),y
iny
lda (ptr3),y
sta (sp),y
lda #$ff
jsr _spi_exchange
lda #$00 ; this gets ignored anyway
jsr _spi_select
lda #$ff
jsr _spi_exchange
; push cmd17
lda #$11
ldy #$4
sta (sp),y
; crc, 0
lda #$00
jsr _SD_command ; rely on command to teardown stack
jsr _SD_readRes1
cmp #$ff ; if 0xFF then you failed
beq end
sta tmp3 ; tmp3 = read
; y = read_attempts
ldy #$0
resp_loop:
lda #$ff
jsr _spi_exchange
sta tmp2 ; tmp2 = read
lda tmp2
cmp #$ff
bne got_resp
iny
bne resp_loop
bra after_read
got_resp:
ldx #$2
ldy #$00
load_loop:
lda #$ff
jsr _spi_exchange
sta (ptr1)
inc ptr1
bne @2
inc ptr1 + 1
@2: dey
bne load_loop
ldy #$00
dex
bne load_loop
lda #$ff
jsr _spi_exchange
lda #$ff
jsr _spi_exchange
after_read:
lda tmp2
sta (ptr2)
lda tmp3
end:
pha
lda #$ff
jsr _spi_exchange
lda #$00 ; this gets ignored anyway
jsr _spi_deselect
lda #$ff
jsr _spi_exchange
pla
rts
.endproc

162
sw/bios/devices/sd_print.c
View File

@@ -3,152 +3,6 @@
#include "sd_print.h" #include "sd_print.h"
#include "sd_card.h" #include "sd_card.h"
/*
void SD_printR1(uint8_t res)
{
if(res == 0xFF)
{ cputs("\tNo response\r\n"); return; }
if(res & 0x80)
{ cputs("\tError: MSB = 1\r\n"); return; }
if(res == 0)
{ cputs("\tCard Ready\r\n"); return; }
if(PARAM_ERROR(res))
cputs("\tParameter Error\r\n");
if(ADDR_ERROR(res))
cputs("\tAddress Error\r\n");
if(ERASE_SEQ_ERROR(res))
cputs("\tErase Sequence Error\r\n");
if(CRC_ERROR(res))
cputs("\tCRC Error\r\n");
if(ILLEGAL_CMD(res))
cputs("\tIllegal Command\r\n");
if(ERASE_RESET(res))
cputs("\tErase Reset Error\r\n");
if(IN_IDLE(res))
cputs("\tIn Idle State\r\n");
}
*/
/*
void SD_printR2(uint8_t *res)
{
SD_printR1(res[0]);
if(res[0] == 0xFF) return;
if(res[1] == 0x00)
cputs("\tNo R2 Error\r\n");
if(OUT_OF_RANGE(res[1]))
cputs("\tOut of Range\r\n");
if(ERASE_PARAM(res[1]))
cputs("\tErase Parameter\r\n");
if(WP_VIOLATION(res[1]))
cputs("\tWP Violation\r\n");
if(CARD_ECC_FAILED(res[1]))
cputs("\tECC Failed\r\n");
if(CC_ERROR(res[1]))
cputs("\tCC Error\r\n");
if(ERROR(res[1]))
cputs("\tError\r\n");
if(WP_ERASE_SKIP(res[1]))
cputs("\tWP Erase Skip\r\n");
if(CARD_LOCKED(res[1]))
cputs("\tCard Locked\r\n");
}
*/
/*
void SD_printR3(uint8_t *res)
{
SD_printR1(res[0]);
if(res[0] > 1) return;
cputs("\tCard Power Up Status: ");
if(POWER_UP_STATUS(res[1]))
{
cputs("READY\r\n");
cputs("\tCCS Status: ");
if(CCS_VAL(res[1])){ cputs("1\r\n"); }
else cputs("0\r\n");
}
else
{
cputs("BUSY\r\n");
}
cputs("\tVDD Window: ");
if(VDD_2728(res[3])) cputs("2.7-2.8, ");
if(VDD_2829(res[2])) cputs("2.8-2.9, ");
if(VDD_2930(res[2])) cputs("2.9-3.0, ");
if(VDD_3031(res[2])) cputs("3.0-3.1, ");
if(VDD_3132(res[2])) cputs("3.1-3.2, ");
if(VDD_3233(res[2])) cputs("3.2-3.3, ");
if(VDD_3334(res[2])) cputs("3.3-3.4, ");
if(VDD_3435(res[2])) cputs("3.4-3.5, ");
if(VDD_3536(res[2])) cputs("3.5-3.6");
cputs("\r\n");
}
*/
/*
void SD_printR7(uint8_t *res)
{
SD_printR1(res[0]);
if(res[0] > 1) return;
cputs("\tCommand Version: ");
cprintf("%x", CMD_VER(res[1]));
cputs("\r\n");
cputs("\tVoltage Accepted: ");
if(VOL_ACC(res[3]) == VOLTAGE_ACC_27_33) {
cputs("2.7-3.6V\r\n");
} else if(VOL_ACC(res[3]) == VOLTAGE_ACC_LOW) {
cputs("LOW VOLTAGE\r\n");
} else if(VOL_ACC(res[3]) == VOLTAGE_ACC_RES1) {
cputs("RESERVED\r\n");
} else if(VOL_ACC(res[3]) == VOLTAGE_ACC_RES2) {
cputs("RESERVED\r\n");
} else {
cputs("NOT DEFINED\r\n");
}
cputs("\tEcho: ");
cprintf("%x", res[4]);
cputs("\r\n");
}
*/
/*
void SD_printCSD(uint8_t *buf)
{
cputs("CSD:\r\n");
cputs("\tCSD Structure: ");
cprintf("%x", (buf[0] & 0b11000000) >> 6);
cputs("\r\n");
cputs("\tTAAC: ");
cprintf("%x", buf[1]);
cputs("\r\n");
cputs("\tNSAC: ");
cprintf("%x", buf[2]);
cputs("\r\n");
cputs("\tTRAN_SPEED: ");
cprintf("%x", buf[3]);
cputs("\r\n");
cputs("\tDevice Size: ");
cprintf("%x", buf[7] & 0b00111111);
cprintf("%x", buf[8]);
cprintf("%x", buf[9]);
cputs("\r\n");
}
*/
void SD_printBuf(uint8_t *buf) void SD_printBuf(uint8_t *buf)
{ {
@@ -170,19 +24,3 @@ void SD_printBuf(uint8_t *buf)
} }
cputs("\r\n"); cputs("\r\n");
} }
/*
void SD_printDataErrToken(uint8_t token)
{
if(token & 0xF0)
cputs("\tNot Error token\r\n");
if(SD_TOKEN_OOR(token))
cputs("\tData out of range\r\n");
if(SD_TOKEN_CECC(token))
cputs("\tCard ECC failed\r\n");
if(SD_TOKEN_CC(token))
cputs("\tCC Error\r\n");
if(SD_TOKEN_ERROR(token))
cputs("\tError\r\n");
}
*/

15
sw/bios/main.c
View File

@@ -31,24 +31,17 @@ int main() {
{ {
cputs("Success\r\n"); cputs("Success\r\n");
// read sector 0
cputs("\r\nReading sector: 0x");
// ((uint8_t)(addr >> 24));
// cprintf("%x", (uint8_t)(addr >> 16));
// cprintf("%x", (uint8_t)(addr >> 8));
// cprintf("%x", (uint8_t)addr);
res[0] = SD_readSingleBlock(addr, buf, &token);
cputs("\r\nResponse:\r\n");
//SD_printR1(res[0]);
res[0] = SD_readSingleBlock(addr, buf, &token);
// if no error, print buffer // if no error, print buffer
if((res[0] == 0x00) && (token == SD_START_TOKEN)) if((res[0] == 0x00) && (token == SD_START_TOKEN))
SD_printBuf(buf); SD_printBuf(buf);
//else if error token received, print //else if error token received, print
else if(!(token & 0xF0)) else if(!(token & 0xF0))
{ {
cputs("Error token:\r\n"); cputs("Error\r\n");
//SD_printDataErrToken(token); } else {
cprintf("bad token: %x\r\n", token);
} }
__asm__ ("jmp (%v)", buf); __asm__ ("jmp (%v)", buf);