Byron Lathi
ff78fd0179
Connect Button 1 to cpu_irqb
...
A maskable interrupt can be generated by pressing button 1, the reset
button remains button 0.
2022-03-14 11:53:45 -05:00
Byron Lathi
e063e9f6a3
Add basic UART device
...
So far the device only transmits the ASCII set on repeat, but will
become fully featured later.
2022-03-13 19:42:41 -05:00
Byron Lathi
c7e8cc3798
Implement enable byte in hw
2022-03-12 21:45:30 -06:00
Byron Lathi
627b6a746a
Add high pair of seven segment displays
...
This also increases the number of registers to 4, one more for the high
pair of displays, and a final one for a mask register which has not been
implemented yet.
2022-03-12 21:24:37 -06:00
Byron Lathi
b7c92d3117
Don't track signaltap
2022-03-12 19:30:37 -06:00
Byron Lathi
3d9d340520
Get the FPGA part working
...
This changes some of the clocks, fixes a bug in the seven segment stuff.
2022-03-11 22:55:26 -06:00
Byron Lathi
cdf3da9b13
Add hex drivers
2022-03-11 18:25:55 -06:00
Byron Lathi
ad55f986f5
Add bb_spi_controller
...
Bit banged spi controller, very simple but very slow.
2022-03-08 15:26:01 -06:00
Byron Lathi
bc98b67ddf
Add boot rom
2022-03-05 18:12:27 -06:00
Byron Lathi
aca17a9cf8
Create quartus project
2022-03-05 17:52:42 -06:00
Byron Lathi
b996d93c99
Create quartus project
2022-03-05 16:38:12 -06:00
