Commit Graph

9 Commits

Author SHA1 Message Date
Byron Lathi
ff78fd0179 Connect Button 1 to cpu_irqb
A maskable interrupt can be generated by pressing button 1, the reset
button remains button 0.
2022-03-14 11:53:45 -05:00
Byron Lathi
cfcf94a875 Integrate uart controller into top level module
Adds new chip select for the UART, and a new entry in the data_out mux
for the UART.
2022-03-14 10:45:45 -05:00
Byron Lathi
e063e9f6a3 Add basic UART device
So far the device only transmits the ASCII set on repeat, but will
become fully featured later.
2022-03-13 19:42:41 -05:00
Byron Lathi
627b6a746a Add high pair of seven segment displays
This also increases the number of registers to 4, one more for the high
pair of displays, and a final one for a mask register which has not been
implemented yet.
2022-03-12 21:24:37 -06:00
Byron Lathi
3d9d340520 Get the FPGA part working
This changes some of the clocks, fixes a bug in the seven segment stuff.
2022-03-11 22:55:26 -06:00
Byron Lathi
cdf3da9b13 Add hex drivers 2022-03-11 18:25:55 -06:00
Byron Lathi
c70272f9de Add addr_decode and testbench 2022-03-05 20:11:47 -06:00
Byron Lathi
bc98b67ddf Add boot rom 2022-03-05 18:12:27 -06:00
Byron Lathi
aca17a9cf8 Create quartus project 2022-03-05 17:52:42 -06:00