51637 lines
3.6 MiB
51637 lines
3.6 MiB
// Copyright (C) 2018 Intel Corporation. All rights reserved.
|
|
// Your use of Intel Corporation's design tools, logic functions
|
|
// and other software and tools, and its AMPP partner logic
|
|
// functions, and any output files from any of the foregoing
|
|
// (including device programming or simulation files), and any
|
|
// associated documentation or information are expressly subject
|
|
// to the terms and conditions of the Intel Program License
|
|
// Subscription Agreement, the Intel Quartus Prime License Agreement,
|
|
// the Intel FPGA IP License Agreement, or other applicable license
|
|
// agreement, including, without limitation, that your use is for
|
|
// the sole purpose of programming logic devices manufactured by
|
|
// Intel and sold by Intel or its authorized distributors. Please
|
|
// refer to the applicable agreement for further details.
|
|
|
|
// VENDOR "Altera"
|
|
// PROGRAM "Quartus Prime"
|
|
// VERSION "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition"
|
|
|
|
// DATE "03/11/2022 22:44:13"
|
|
|
|
//
|
|
// Device: Altera 10M50DAF484C7G Package FBGA484
|
|
//
|
|
|
|
//
|
|
// This Verilog file should be used for ModelSim-Altera (SystemVerilog) only
|
|
//
|
|
|
|
`timescale 1 ps/ 1 ps
|
|
|
|
module super6502 (
|
|
altera_reserved_tms,
|
|
altera_reserved_tck,
|
|
altera_reserved_tdi,
|
|
altera_reserved_tdo,
|
|
clk_50,
|
|
rst_n,
|
|
cpu_addr,
|
|
cpu_data,
|
|
cpu_vpb,
|
|
cpu_mlb,
|
|
cpu_rwb,
|
|
cpu_sync,
|
|
cpu_led,
|
|
cpu_resb,
|
|
cpu_rdy,
|
|
cpu_sob,
|
|
cpu_irqb,
|
|
cpu_phi2,
|
|
cpu_be,
|
|
cpu_nmib,
|
|
HEX0,
|
|
HEX1,
|
|
HEX2,
|
|
HEX3);
|
|
input altera_reserved_tms;
|
|
input altera_reserved_tck;
|
|
input altera_reserved_tdi;
|
|
output altera_reserved_tdo;
|
|
input reg clk_50 ;
|
|
input logic rst_n ;
|
|
input logic [15:0] cpu_addr ;
|
|
inout logic [7:0] cpu_data ;
|
|
input logic cpu_vpb ;
|
|
input logic cpu_mlb ;
|
|
input logic cpu_rwb ;
|
|
input logic cpu_sync ;
|
|
output logic cpu_led ;
|
|
output logic cpu_resb ;
|
|
output logic cpu_rdy ;
|
|
output logic cpu_sob ;
|
|
output logic cpu_irqb ;
|
|
output logic cpu_phi2 ;
|
|
output logic cpu_be ;
|
|
output logic cpu_nmib ;
|
|
output logic [6:0] HEX0 ;
|
|
output logic [6:0] HEX1 ;
|
|
output logic [6:0] HEX2 ;
|
|
output logic [6:0] HEX3 ;
|
|
|
|
// Design Ports Information
|
|
// cpu_vpb => Location: PIN_W10, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_mlb => Location: PIN_W7, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_sync => Location: PIN_AA15, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_led => Location: PIN_V10, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_resb => Location: PIN_V9, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_rdy => Location: PIN_W9, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_sob => Location: PIN_V8, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_irqb => Location: PIN_W8, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_phi2 => Location: PIN_V7, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_be => Location: PIN_W6, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_nmib => Location: PIN_V5, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[0] => Location: PIN_C14, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[1] => Location: PIN_E15, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[2] => Location: PIN_C15, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[3] => Location: PIN_C16, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[4] => Location: PIN_E16, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[5] => Location: PIN_D17, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX0[6] => Location: PIN_C17, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[0] => Location: PIN_C18, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[1] => Location: PIN_D18, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[2] => Location: PIN_E18, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[3] => Location: PIN_B16, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[4] => Location: PIN_A17, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[5] => Location: PIN_A18, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX1[6] => Location: PIN_B17, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[0] => Location: PIN_B20, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[1] => Location: PIN_A20, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[2] => Location: PIN_B19, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[3] => Location: PIN_A21, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[4] => Location: PIN_B21, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[5] => Location: PIN_C22, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX2[6] => Location: PIN_B22, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[0] => Location: PIN_F21, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[1] => Location: PIN_E22, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[2] => Location: PIN_E21, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[3] => Location: PIN_C19, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[4] => Location: PIN_C20, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[5] => Location: PIN_D19, I/O Standard: 2.5 V, Current Strength: Default
|
|
// HEX3[6] => Location: PIN_E17, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[0] => Location: PIN_AA14, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[1] => Location: PIN_W12, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[2] => Location: PIN_AB12, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[3] => Location: PIN_AB11, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[4] => Location: PIN_AB10, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[5] => Location: PIN_AA9, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[6] => Location: PIN_AA8, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_data[7] => Location: PIN_AA7, I/O Standard: 2.5 V, Current Strength: Default
|
|
// rst_n => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[0] => Location: PIN_W13, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[15] => Location: PIN_AA6, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[1] => Location: PIN_AB13, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[2] => Location: PIN_Y11, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[3] => Location: PIN_W11, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[4] => Location: PIN_AA10, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[5] => Location: PIN_Y8, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[6] => Location: PIN_Y7, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[7] => Location: PIN_Y6, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[13] => Location: PIN_AB3, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[14] => Location: PIN_AA5, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[8] => Location: PIN_Y5, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[9] => Location: PIN_Y4, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[10] => Location: PIN_Y3, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[11] => Location: PIN_AA2, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_addr[12] => Location: PIN_AB2, I/O Standard: 2.5 V, Current Strength: Default
|
|
// cpu_rwb => Location: PIN_W5, I/O Standard: 2.5 V, Current Strength: Default
|
|
// clk_50 => Location: PIN_P11, I/O Standard: 2.5 V, Current Strength: Default
|
|
// altera_reserved_tms => Location: PIN_H2, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default
|
|
// altera_reserved_tck => Location: PIN_G2, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default
|
|
// altera_reserved_tdi => Location: PIN_L4, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default
|
|
// altera_reserved_tdo => Location: PIN_M5, I/O Standard: 2.5 V, Current Strength: Default
|
|
|
|
|
|
wire gnd;
|
|
wire vcc;
|
|
wire unknown;
|
|
|
|
assign gnd = 1'b0;
|
|
assign vcc = 1'b1;
|
|
assign unknown = 1'bx;
|
|
|
|
tri1 devclrn;
|
|
tri1 devpor;
|
|
tri1 devoe;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][6]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][7]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~15_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~9_combout ;
|
|
wire \auto_hub|~GND~combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~0_combout ;
|
|
wire \cpu_mlb~input_o ;
|
|
wire \~QUARTUS_CREATED_GND~I_combout ;
|
|
wire \~QUARTUS_CREATED_UNVM~~busy ;
|
|
wire \~ALTERA_CONFIG_SEL~~ibuf_o ;
|
|
wire \~ALTERA_CONFIG_SEL~~padout ;
|
|
wire \~ALTERA_nCONFIG~~ibuf_o ;
|
|
wire \~ALTERA_nCONFIG~~padout ;
|
|
wire \~ALTERA_nSTATUS~~ibuf_o ;
|
|
wire \~ALTERA_nSTATUS~~padout ;
|
|
wire \~ALTERA_CONF_DONE~~ibuf_o ;
|
|
wire \~ALTERA_CONF_DONE~~padout ;
|
|
wire \~QUARTUS_CREATED_ADC1~~eoc ;
|
|
wire \~QUARTUS_CREATED_ADC2~~eoc ;
|
|
wire \altera_reserved_tms~input_o ;
|
|
wire \altera_reserved_tck~input_o ;
|
|
wire \altera_reserved_tdi~input_o ;
|
|
wire \altera_internal_jtag~TMSUTAP ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~6_combout ;
|
|
wire \altera_internal_jtag~TDIUTAP ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ;
|
|
wire \~QIC_CREATED_GND~I_combout ;
|
|
wire \auto_signaltap_0|~GND~combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10]~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][4]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~12_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~15_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][3]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~19_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~27_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~5_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][3]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][1]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~17_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][2]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~18_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~5_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~6_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][1]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~16 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~17_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~19_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~21_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~23_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~25_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~27_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~29_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~31_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~33_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~35_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~37_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~39_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~41_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~17_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][5]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~21_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~15_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~18_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][6]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~22_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~19_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][7]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~23_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~17_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~20_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][8]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~24_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~18_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~21_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][9]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~25_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~19_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][4]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~20_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~6_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][5]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ;
|
|
wire \clk_50~input_o ;
|
|
wire \cpu_clk|altpll_component|auto_generated|wire_pll1_fbout ;
|
|
wire \cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ;
|
|
wire \cpu_addr[14]~input_o ;
|
|
wire \cpu_addr[13]~input_o ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ;
|
|
wire \cpu_addr[0]~input_o ;
|
|
wire \cpu_addr[1]~input_o ;
|
|
wire \cpu_addr[2]~input_o ;
|
|
wire \cpu_addr[3]~input_o ;
|
|
wire \cpu_addr[4]~input_o ;
|
|
wire \cpu_addr[5]~input_o ;
|
|
wire \cpu_addr[6]~input_o ;
|
|
wire \cpu_addr[7]~input_o ;
|
|
wire \cpu_addr[8]~input_o ;
|
|
wire \cpu_addr[9]~input_o ;
|
|
wire \cpu_addr[10]~input_o ;
|
|
wire \cpu_addr[11]~input_o ;
|
|
wire \cpu_addr[12]~input_o ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~6 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~8 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~10 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~14 ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~5_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~11 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~13 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~15 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~17 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~19 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~21 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~23 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~25 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~27 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10]~28_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~26_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~24_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~21 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~23_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~25_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~24 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~26_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~28_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~1 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~3 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~6 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~9 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~12 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~15 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~17_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~18 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~22_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~22_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~18_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~1 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~3 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~5 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~7 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~9 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~11 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~13 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~15 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~17 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0_combout ;
|
|
wire \cpu_addr[15]~input_o ;
|
|
wire \decode|hex_cs~0_combout ;
|
|
wire \decode|hex_cs~1_combout ;
|
|
wire \decode|LessThan2~1_combout ;
|
|
wire \decode|LessThan1~0_combout ;
|
|
wire \cpu_rwb~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ;
|
|
wire \cpu_data[6]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|regoutff~q ;
|
|
wire \cpu_phi2~0_combout ;
|
|
wire \cpu_phi2~reg0_q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|regoutff~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38_combout ;
|
|
wire \cpu_data[7]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18_combout ;
|
|
wire \cpu_data[3]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[48]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|regoutff~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13_combout ;
|
|
wire \cpu_data[2]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|regoutff~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28_combout ;
|
|
wire \cpu_data[5]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|regoutff~q ;
|
|
wire \cpu_data[4]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[49]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~3_combout ;
|
|
wire \cpu_data[1]~input_o ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[46]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[43]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~4_combout ;
|
|
wire \cpu_sync~input_o ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|regoutff~q ;
|
|
wire \cpu_vpb~input_o ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[56]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|regoutff~q ;
|
|
wire \rst_n~input_o ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[57]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[27]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[42]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[39]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~6_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[31]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[32]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[33]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~8_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[38]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[35]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff~q ;
|
|
wire \cpu_data[0]~input_o ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[36]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~10_combout ;
|
|
wire \decode|LessThan2~0_combout ;
|
|
wire \decode|hex_cs~2_combout ;
|
|
wire \segs|_data~11_combout ;
|
|
wire \segs|_data[1][4]~10_combout ;
|
|
wire \segs|_data[1][1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff~q ;
|
|
wire \segs|_data~9_combout ;
|
|
wire \segs|_data[1][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff~q ;
|
|
wire \segs|_data~8_combout ;
|
|
wire \segs|_data[0][6]~1_combout ;
|
|
wire \segs|_data[0][7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff~q ;
|
|
wire \segs|_data~12_combout ;
|
|
wire \segs|_data[1][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~16_combout ;
|
|
wire \segs|_data~6_combout ;
|
|
wire \segs|_data[0][5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff~q ;
|
|
wire \segs|_data~4_combout ;
|
|
wire \segs|_data[0][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff~q ;
|
|
wire \segs|_data~5_combout ;
|
|
wire \segs|_data[0][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff~q ;
|
|
wire \segs|_data~7_combout ;
|
|
wire \segs|_data[0][6]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~17_combout ;
|
|
wire \segs|_data~2_combout ;
|
|
wire \segs|_data[0][1]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff~q ;
|
|
wire \segs|_data~0_combout ;
|
|
wire \segs|_data[0][0]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff~q ;
|
|
wire \segs|_data~3_combout ;
|
|
wire \segs|_data[0][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~18_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[26]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[24]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[23]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~11_combout ;
|
|
wire \segs|_data~14_combout ;
|
|
wire \segs|_data[1][4]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff~q ;
|
|
wire \segs|_data~15_combout ;
|
|
wire \segs|_data[1][5]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[13]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff~q ;
|
|
wire \segs|_data~13_combout ;
|
|
wire \segs|_data[1][3]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[11]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff~q ;
|
|
wire \segs|_data~16_combout ;
|
|
wire \segs|_data[1][6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~14_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[22]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[21]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff~q ;
|
|
wire \rst_n~_wirecell_combout ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[19]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~12_combout ;
|
|
wire \segs|_data~17_combout ;
|
|
wire \segs|_data[1][7]~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[15]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff~q ;
|
|
wire \decode|hex_cs~2_wirecell_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|acq_trigger_in_reg[17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~27 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~29_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~31_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|collecting_post_data_var~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita9~combout ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][2]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][5]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a5 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a6 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a7 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a8 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][18]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][18]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[19]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][19]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[20]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][20]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[21]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][21]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[22]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][22]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[23]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][23]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][23]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][23]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][24]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[25]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a19 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a23 ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[27]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][27]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[29]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][29]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[30]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[31]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][31]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][31]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[33]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][33]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[35]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][35]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a28 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a30 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a32 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a33 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a35 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][36]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][36]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][36]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[37]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][37]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[39]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][39]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[40]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][40]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[41]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][42]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][42]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][42]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[44]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a39 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a41 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][45]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[46]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][46]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[47]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[49]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][49]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][49]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[50]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][50]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[53]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][53]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a46 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a47 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a48 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a49 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a50 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a51 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a52 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a53 ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[54]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][54]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[55]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][55]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][56]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][57]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][57]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a55 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a57 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~57_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a56 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~56_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~55_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~54_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~53_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~52_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~51_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~50_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~49_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~48_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~47_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~46_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~45_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a44 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~44_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a43 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~43_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a42 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~42_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~41_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a40 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~40_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~39_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a38 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~38_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a37 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~37_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~36_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~35_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a34 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~34_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~33_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~32_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a31 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~31_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~30_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a29 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~29_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~28_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~27_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a26 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~26_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a25 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~25_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a24 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~24_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~23_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a22 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~22_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a21 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~21_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a20 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~18_combout ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[9]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][10]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[11]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][11]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][11]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[13]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][13]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][14]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][15]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][16]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][16]~q ;
|
|
wire \auto_signaltap_0|acq_data_in_reg[17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][17]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a17 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~17_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a16 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a15 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a14 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a13 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a12 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a11 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a10 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a4 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a3 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a2 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a1 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0~portbdataout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~18_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~17_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|Add0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~4_combout ;
|
|
wire \auto_signaltap_0|~VCC~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~17_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2]~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~21_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~18_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~32_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~33 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~35_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~36 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~37_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~38 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~39_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~40 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~41_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~42 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~43_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~44 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~45_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~46 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~47_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~48 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~49_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~50 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~51_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~52 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~53_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~54 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~55_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~56 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~57_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~58 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~59_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~60 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~61_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~62 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~63_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~64 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~65_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~66 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~67_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~68 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~69_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~70 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~71_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~72 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~73_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~74 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~75_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~76 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~77_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~78 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~79_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~80 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~81_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~82 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~83_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~84 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~85_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~86 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~87_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~88 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~89_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~90 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~91_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~92 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~93_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~94 ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31]~95_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal3~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|segment_shift_var~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~COUT ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[0]~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[1]~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[2]~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[3]~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[4]~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[5]~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[6]~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[7]~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[8]~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[9]~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[11]~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[13]~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[16]~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[17]~17_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[18]~18_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[20]~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~20_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[19]~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~19_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~18_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~17_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~16_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[15]~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~15_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[14]~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~14_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~13_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[12]~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~12_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~11_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~feeder_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~q ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[10]~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~10_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~9_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~8_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~7_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~6_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~5_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~4_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~3_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~2_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~0_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~1_combout ;
|
|
wire \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~15 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~17 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~19 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~12 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~15_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~12_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~17_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~12 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~14 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~8 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~11_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~18_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~13_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~16_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~17_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~21_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~22_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~19_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~20_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~0_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~q ;
|
|
wire \altera_internal_jtag~TCKUTAP ;
|
|
wire \altera_internal_jtag~TCKUTAPclkctrl_outclk ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~4_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][2]~q ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~10_combout ;
|
|
wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0_combout ;
|
|
wire \main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1_combout ;
|
|
wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr6~0_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr5~0_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr4~0_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr3~0_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr2~0_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr1~0_combout ;
|
|
wire \segs|hex_drivers[0]|WideOr0~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr6~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr5~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr4~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr3~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr2~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr1~0_combout ;
|
|
wire \segs|hex_drivers[1]|WideOr0~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr6~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr5~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr4~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr3~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr2~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr1~0_combout ;
|
|
wire \segs|hex_drivers[2]|WideOr0~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr6~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr5~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr4~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr3~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr2~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr1~0_combout ;
|
|
wire \segs|hex_drivers[3]|WideOr0~0_combout ;
|
|
wire \altera_internal_jtag~TDO ;
|
|
wire [57:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs ;
|
|
wire [10:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter ;
|
|
wire [0:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr ;
|
|
wire [9:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs ;
|
|
wire [32:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 ;
|
|
wire [4:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter ;
|
|
wire [173:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs ;
|
|
wire [4:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter ;
|
|
wire [3:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter ;
|
|
wire [2:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt ;
|
|
wire [1:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b ;
|
|
wire [9:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed ;
|
|
wire [3:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg ;
|
|
wire [30:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 ;
|
|
wire [3:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR ;
|
|
wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w ;
|
|
wire [4:0] \cpu_clk|altpll_component|auto_generated|wire_pll1_clk ;
|
|
wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w ;
|
|
wire [0:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit ;
|
|
wire [15:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg ;
|
|
wire [3:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg ;
|
|
wire [14:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg ;
|
|
wire [4:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal ;
|
|
wire [9:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed ;
|
|
wire [6:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg ;
|
|
wire [9:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig ;
|
|
wire [1:0] \main_memory|altsyncram_component|auto_generated|address_reg_a ;
|
|
wire [0:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed ;
|
|
wire [7:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg ;
|
|
wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg ;
|
|
wire [31:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg ;
|
|
wire [10:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count ;
|
|
wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w ;
|
|
wire [15:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state ;
|
|
wire [4:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit ;
|
|
wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w ;
|
|
wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR ;
|
|
wire [3:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs ;
|
|
wire [3:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR ;
|
|
wire [1:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg ;
|
|
wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w ;
|
|
wire [9:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit ;
|
|
wire [2:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg ;
|
|
wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg ;
|
|
wire [57:0] \auto_signaltap_0|acq_data_in_reg ;
|
|
wire [9:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg ;
|
|
wire [11:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg ;
|
|
wire [57:0] \auto_signaltap_0|acq_trigger_in_reg ;
|
|
wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata ;
|
|
wire [20:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs ;
|
|
wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg ;
|
|
wire [5:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit ;
|
|
wire [9:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs ;
|
|
wire [20:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs ;
|
|
wire [16:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs ;
|
|
wire [20:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq ;
|
|
wire [15:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr ;
|
|
|
|
wire [4:0] \cpu_clk|altpll_component|auto_generated|pll1_CLK_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a24_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a18_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a27_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a20_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a4_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a28_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a5_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a14_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a6_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a30_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTBDATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a15_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a7_PORTADATAOUT_bus ;
|
|
wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTBDATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTADATAOUT_bus ;
|
|
wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus ;
|
|
wire [8:0] \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54_PORTBDATAOUT_bus ;
|
|
|
|
assign \cpu_clk|altpll_component|auto_generated|wire_pll1_clk [0] = \cpu_clk|altpll_component|auto_generated|pll1_CLK_bus [0];
|
|
assign \cpu_clk|altpll_component|auto_generated|wire_pll1_clk [1] = \cpu_clk|altpll_component|auto_generated|pll1_CLK_bus [1];
|
|
assign \cpu_clk|altpll_component|auto_generated|wire_pll1_clk [2] = \cpu_clk|altpll_component|auto_generated|pll1_CLK_bus [2];
|
|
assign \cpu_clk|altpll_component|auto_generated|wire_pll1_clk [3] = \cpu_clk|altpll_component|auto_generated|pll1_CLK_bus [3];
|
|
assign \cpu_clk|altpll_component|auto_generated|wire_pll1_clk [4] = \cpu_clk|altpll_component|auto_generated|pll1_CLK_bus [4];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a24_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a18_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a27_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a20_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a4_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a28_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a5_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a14_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a6_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a30_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTBDATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a15_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a7_PORTADATAOUT_bus [0];
|
|
|
|
assign \main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTBDATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTADATAOUT_bus [0];
|
|
|
|
assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTBDATAOUT_bus [0];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a1 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a2 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a3 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [3];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a4 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [4];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a5 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [5];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a6 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [6];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a7 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [7];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a8 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus [8];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a10 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a11 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a12 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [3];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a13 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [4];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a14 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [5];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a15 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [6];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a16 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [7];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a17 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus [8];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a19 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a20 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a21 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [3];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a22 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [4];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a23 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [5];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a24 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [6];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a25 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [7];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a26 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus [8];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a28 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a29 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a30 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [3];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a31 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [4];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a32 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [5];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a33 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [6];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a34 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [7];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a35 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus [8];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a37 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a38 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a39 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [3];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a40 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [4];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a41 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [5];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a42 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [6];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a43 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [7];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a44 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus [8];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a46 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a47 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a48 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [3];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a49 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [4];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a50 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [5];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a51 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [6];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a52 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [7];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a53 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus [8];
|
|
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54~portbdataout = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54_PORTBDATAOUT_bus [0];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a55 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54_PORTBDATAOUT_bus [1];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a56 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54_PORTBDATAOUT_bus [2];
|
|
assign \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a57 = \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54_PORTBDATAOUT_bus [3];
|
|
|
|
// Location: FF_X45_Y37_N29
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N13
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~14 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][6]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~14 .lut_mask = 16'hAFA0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N7
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~15 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][7]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~15 .lut_mask = 16'hAFA0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~8 .lut_mask = 16'hF0CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~9 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~9 .lut_mask = 16'hF0CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~3 .lut_mask = 16'hCCFF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~3_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~0 .lut_mask = 16'h75A8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_ff~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~0 .lut_mask = 16'h7474;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_out_mode_ff~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y50_N16
|
|
fiftyfivenm_lcell_comb \~QUARTUS_CREATED_GND~I (
|
|
// Equation(s):
|
|
// \~QUARTUS_CREATED_GND~I_combout = GND
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \~QUARTUS_CREATED_GND~I .lut_mask = 16'h0000;
|
|
defparam \~QUARTUS_CREATED_GND~I .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X31_Y0_N23
|
|
fiftyfivenm_io_obuf \cpu_led~output (
|
|
.i(gnd),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_led),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_led~output .bus_hold = "false";
|
|
defparam \cpu_led~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X31_Y0_N30
|
|
fiftyfivenm_io_obuf \cpu_resb~output (
|
|
.i(\rst_n~input_o ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_resb),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_resb~output .bus_hold = "false";
|
|
defparam \cpu_resb~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X22_Y0_N2
|
|
fiftyfivenm_io_obuf \cpu_rdy~output (
|
|
.i(vcc),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_rdy),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_rdy~output .bus_hold = "false";
|
|
defparam \cpu_rdy~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X20_Y0_N16
|
|
fiftyfivenm_io_obuf \cpu_sob~output (
|
|
.i(gnd),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_sob),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_sob~output .bus_hold = "false";
|
|
defparam \cpu_sob~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X24_Y0_N2
|
|
fiftyfivenm_io_obuf \cpu_irqb~output (
|
|
.i(vcc),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_irqb),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_irqb~output .bus_hold = "false";
|
|
defparam \cpu_irqb~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X20_Y0_N23
|
|
fiftyfivenm_io_obuf \cpu_phi2~output (
|
|
.i(\cpu_phi2~reg0_q ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_phi2),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_phi2~output .bus_hold = "false";
|
|
defparam \cpu_phi2~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X16_Y0_N30
|
|
fiftyfivenm_io_obuf \cpu_be~output (
|
|
.i(vcc),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_be),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_be~output .bus_hold = "false";
|
|
defparam \cpu_be~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X14_Y0_N9
|
|
fiftyfivenm_io_obuf \cpu_nmib~output (
|
|
.i(vcc),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_nmib),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_nmib~output .bus_hold = "false";
|
|
defparam \cpu_nmib~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X58_Y54_N16
|
|
fiftyfivenm_io_obuf \HEX0[0]~output (
|
|
.i(\segs|hex_drivers[0]|WideOr6~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[0]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[0]~output .bus_hold = "false";
|
|
defparam \HEX0[0]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X74_Y54_N9
|
|
fiftyfivenm_io_obuf \HEX0[1]~output (
|
|
.i(\segs|hex_drivers[0]|WideOr5~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[1]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[1]~output .bus_hold = "false";
|
|
defparam \HEX0[1]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X60_Y54_N2
|
|
fiftyfivenm_io_obuf \HEX0[2]~output (
|
|
.i(\segs|hex_drivers[0]|WideOr4~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[2]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[2]~output .bus_hold = "false";
|
|
defparam \HEX0[2]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X62_Y54_N30
|
|
fiftyfivenm_io_obuf \HEX0[3]~output (
|
|
.i(\segs|hex_drivers[0]|WideOr3~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[3]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[3]~output .bus_hold = "false";
|
|
defparam \HEX0[3]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X74_Y54_N2
|
|
fiftyfivenm_io_obuf \HEX0[4]~output (
|
|
.i(\segs|hex_drivers[0]|WideOr2~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[4]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[4]~output .bus_hold = "false";
|
|
defparam \HEX0[4]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X74_Y54_N16
|
|
fiftyfivenm_io_obuf \HEX0[5]~output (
|
|
.i(\segs|hex_drivers[0]|WideOr1~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[5]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[5]~output .bus_hold = "false";
|
|
defparam \HEX0[5]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X74_Y54_N23
|
|
fiftyfivenm_io_obuf \HEX0[6]~output (
|
|
.i(!\segs|hex_drivers[0]|WideOr0~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX0[6]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX0[6]~output .bus_hold = "false";
|
|
defparam \HEX0[6]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X69_Y54_N23
|
|
fiftyfivenm_io_obuf \HEX1[0]~output (
|
|
.i(\segs|hex_drivers[1]|WideOr6~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[0]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[0]~output .bus_hold = "false";
|
|
defparam \HEX1[0]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y49_N9
|
|
fiftyfivenm_io_obuf \HEX1[1]~output (
|
|
.i(\segs|hex_drivers[1]|WideOr5~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[1]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[1]~output .bus_hold = "false";
|
|
defparam \HEX1[1]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y49_N2
|
|
fiftyfivenm_io_obuf \HEX1[2]~output (
|
|
.i(\segs|hex_drivers[1]|WideOr4~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[2]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[2]~output .bus_hold = "false";
|
|
defparam \HEX1[2]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X60_Y54_N9
|
|
fiftyfivenm_io_obuf \HEX1[3]~output (
|
|
.i(\segs|hex_drivers[1]|WideOr3~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[3]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[3]~output .bus_hold = "false";
|
|
defparam \HEX1[3]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X64_Y54_N2
|
|
fiftyfivenm_io_obuf \HEX1[4]~output (
|
|
.i(\segs|hex_drivers[1]|WideOr2~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[4]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[4]~output .bus_hold = "false";
|
|
defparam \HEX1[4]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X66_Y54_N30
|
|
fiftyfivenm_io_obuf \HEX1[5]~output (
|
|
.i(\segs|hex_drivers[1]|WideOr1~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[5]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[5]~output .bus_hold = "false";
|
|
defparam \HEX1[5]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X69_Y54_N30
|
|
fiftyfivenm_io_obuf \HEX1[6]~output (
|
|
.i(!\segs|hex_drivers[1]|WideOr0~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX1[6]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX1[6]~output .bus_hold = "false";
|
|
defparam \HEX1[6]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y44_N9
|
|
fiftyfivenm_io_obuf \HEX2[0]~output (
|
|
.i(\segs|hex_drivers[2]|WideOr6~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[0]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[0]~output .bus_hold = "false";
|
|
defparam \HEX2[0]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X66_Y54_N2
|
|
fiftyfivenm_io_obuf \HEX2[1]~output (
|
|
.i(\segs|hex_drivers[2]|WideOr5~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[1]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[1]~output .bus_hold = "false";
|
|
defparam \HEX2[1]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X69_Y54_N16
|
|
fiftyfivenm_io_obuf \HEX2[2]~output (
|
|
.i(\segs|hex_drivers[2]|WideOr4~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[2]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[2]~output .bus_hold = "false";
|
|
defparam \HEX2[2]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y44_N2
|
|
fiftyfivenm_io_obuf \HEX2[3]~output (
|
|
.i(\segs|hex_drivers[2]|WideOr3~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[3]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[3]~output .bus_hold = "false";
|
|
defparam \HEX2[3]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y43_N2
|
|
fiftyfivenm_io_obuf \HEX2[4]~output (
|
|
.i(\segs|hex_drivers[2]|WideOr2~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[4]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[4]~output .bus_hold = "false";
|
|
defparam \HEX2[4]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y35_N2
|
|
fiftyfivenm_io_obuf \HEX2[5]~output (
|
|
.i(\segs|hex_drivers[2]|WideOr1~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[5]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[5]~output .bus_hold = "false";
|
|
defparam \HEX2[5]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y43_N9
|
|
fiftyfivenm_io_obuf \HEX2[6]~output (
|
|
.i(!\segs|hex_drivers[2]|WideOr0~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX2[6]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX2[6]~output .bus_hold = "false";
|
|
defparam \HEX2[6]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y35_N23
|
|
fiftyfivenm_io_obuf \HEX3[0]~output (
|
|
.i(\segs|hex_drivers[3]|WideOr6~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[0]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[0]~output .bus_hold = "false";
|
|
defparam \HEX3[0]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y33_N9
|
|
fiftyfivenm_io_obuf \HEX3[1]~output (
|
|
.i(\segs|hex_drivers[3]|WideOr5~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[1]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[1]~output .bus_hold = "false";
|
|
defparam \HEX3[1]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y33_N2
|
|
fiftyfivenm_io_obuf \HEX3[2]~output (
|
|
.i(\segs|hex_drivers[3]|WideOr4~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[2]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[2]~output .bus_hold = "false";
|
|
defparam \HEX3[2]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X69_Y54_N9
|
|
fiftyfivenm_io_obuf \HEX3[3]~output (
|
|
.i(\segs|hex_drivers[3]|WideOr3~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[3]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[3]~output .bus_hold = "false";
|
|
defparam \HEX3[3]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y41_N9
|
|
fiftyfivenm_io_obuf \HEX3[4]~output (
|
|
.i(\segs|hex_drivers[3]|WideOr2~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[4]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[4]~output .bus_hold = "false";
|
|
defparam \HEX3[4]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y41_N2
|
|
fiftyfivenm_io_obuf \HEX3[5]~output (
|
|
.i(\segs|hex_drivers[3]|WideOr1~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[5]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[5]~output .bus_hold = "false";
|
|
defparam \HEX3[5]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X78_Y43_N16
|
|
fiftyfivenm_io_obuf \HEX3[6]~output (
|
|
.i(!\segs|hex_drivers[3]|WideOr0~0_combout ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(HEX3[6]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \HEX3[6]~output .bus_hold = "false";
|
|
defparam \HEX3[6]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X51_Y0_N23
|
|
fiftyfivenm_io_obuf \cpu_data[0]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[0]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[0]~output .bus_hold = "false";
|
|
defparam \cpu_data[0]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X46_Y0_N9
|
|
fiftyfivenm_io_obuf \cpu_data[1]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[1]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[1]~output .bus_hold = "false";
|
|
defparam \cpu_data[1]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X40_Y0_N23
|
|
fiftyfivenm_io_obuf \cpu_data[2]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[2]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[2]~output .bus_hold = "false";
|
|
defparam \cpu_data[2]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X38_Y0_N9
|
|
fiftyfivenm_io_obuf \cpu_data[3]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[3]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[3]~output .bus_hold = "false";
|
|
defparam \cpu_data[3]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X38_Y0_N16
|
|
fiftyfivenm_io_obuf \cpu_data[4]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[4]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[4]~output .bus_hold = "false";
|
|
defparam \cpu_data[4]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X34_Y0_N23
|
|
fiftyfivenm_io_obuf \cpu_data[5]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[5]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[5]~output .bus_hold = "false";
|
|
defparam \cpu_data[5]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X31_Y0_N16
|
|
fiftyfivenm_io_obuf \cpu_data[6]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[6]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[6]~output .bus_hold = "false";
|
|
defparam \cpu_data[6]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X29_Y0_N16
|
|
fiftyfivenm_io_obuf \cpu_data[7]~output (
|
|
.i(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout ),
|
|
.oe(\cpu_rwb~input_o ),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(cpu_data[7]),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \cpu_data[7]~output .bus_hold = "false";
|
|
defparam \cpu_data[7]~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOOBUF_X0_Y28_N23
|
|
fiftyfivenm_io_obuf \altera_reserved_tdo~output (
|
|
.i(\altera_internal_jtag~TDO ),
|
|
.oe(vcc),
|
|
.seriesterminationcontrol(16'b0000000000000000),
|
|
.devoe(devoe),
|
|
.o(altera_reserved_tdo),
|
|
.obar());
|
|
// synopsys translate_off
|
|
defparam \altera_reserved_tdo~output .bus_hold = "false";
|
|
defparam \altera_reserved_tdo~output .open_drain_output = "false";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X0_Y29_N15
|
|
fiftyfivenm_io_ibuf \altera_reserved_tms~input (
|
|
.i(altera_reserved_tms),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\altera_reserved_tms~input_o ));
|
|
// synopsys translate_off
|
|
defparam \altera_reserved_tms~input .bus_hold = "false";
|
|
defparam \altera_reserved_tms~input .listen_to_nsleep_signal = "false";
|
|
defparam \altera_reserved_tms~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X0_Y29_N22
|
|
fiftyfivenm_io_ibuf \altera_reserved_tck~input (
|
|
.i(altera_reserved_tck),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\altera_reserved_tck~input_o ));
|
|
// synopsys translate_off
|
|
defparam \altera_reserved_tck~input .bus_hold = "false";
|
|
defparam \altera_reserved_tck~input .listen_to_nsleep_signal = "false";
|
|
defparam \altera_reserved_tck~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X0_Y28_N15
|
|
fiftyfivenm_io_ibuf \altera_reserved_tdi~input (
|
|
.i(altera_reserved_tdi),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\altera_reserved_tdi~input_o ));
|
|
// synopsys translate_off
|
|
defparam \altera_reserved_tdi~input .bus_hold = "false";
|
|
defparam \altera_reserved_tdi~input .listen_to_nsleep_signal = "false";
|
|
defparam \altera_reserved_tdi~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: JTAG_X43_Y40_N0
|
|
fiftyfivenm_jtag altera_internal_jtag(
|
|
.tms(\altera_reserved_tms~input_o ),
|
|
.tck(\altera_reserved_tck~input_o ),
|
|
.tdi(\altera_reserved_tdi~input_o ),
|
|
.tdouser(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~q ),
|
|
.tdo(\altera_internal_jtag~TDO ),
|
|
.tmsutap(\altera_internal_jtag~TMSUTAP ),
|
|
.tckutap(\altera_internal_jtag~TCKUTAP ),
|
|
.tdiutap(\altera_internal_jtag~TDIUTAP ),
|
|
.shiftuser(),
|
|
.clkdruser(),
|
|
.updateuser(),
|
|
.runidleuser(),
|
|
.usr1user());
|
|
|
|
// Location: LCCOMB_X45_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 (
|
|
.dataa(gnd),
|
|
.datab(\altera_internal_jtag~TMSUTAP ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 .lut_mask = 16'hCCC0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 .lut_mask = 16'hA0A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [9]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 .lut_mask = 16'h5050;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [14]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 .lut_mask = 16'hFFFC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N3
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [10]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 .lut_mask = 16'hAA88;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [13]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 .lut_mask = 16'hFFF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N5
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~14 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [13]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~14 .lut_mask = 16'hA0A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N29
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [14]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 .lut_mask = 16'hAA88;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y41_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]),
|
|
.datad(\altera_internal_jtag~TMSUTAP ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 .lut_mask = 16'h0F00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y41_N7
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y41_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 .lut_mask = 16'h0FF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y41_N11
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(!\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y41_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 .lut_mask = 16'h5AF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y41_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(!\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y41_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [2]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 .lut_mask = 16'h5575;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y41_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 .lut_mask = 16'hFEFF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 .lut_mask = 16'hAAA8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 .lut_mask = 16'h5050;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\altera_internal_jtag~TMSUTAP ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 .lut_mask = 16'hF0C0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N29
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [6]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 .lut_mask = 16'hFFF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N11
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\altera_internal_jtag~TMSUTAP ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 .lut_mask = 16'hF000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 .lut_mask = 16'hFFFC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\altera_internal_jtag~TMSUTAP ),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 .lut_mask = 16'hFFCC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~16 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 .lut_mask = 16'h33CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y26_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~6 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~6 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\altera_internal_jtag~TDIUTAP ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N11
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [9]),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N13
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [6]),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N29
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [5]),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .lut_mask = 16'h00FF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N1
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [2]),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .lut_mask = 16'h00FF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N3
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [6]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [9]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [8]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 .lut_mask = 16'h0001;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [5]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 .lut_mask = 16'h0004;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 .lut_mask = 16'h0400;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y38_N24
|
|
fiftyfivenm_lcell_comb \~QIC_CREATED_GND~I (
|
|
// Equation(s):
|
|
// \~QIC_CREATED_GND~I_combout = GND
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\~QIC_CREATED_GND~I_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \~QIC_CREATED_GND~I .lut_mask = 16'h0000;
|
|
defparam \~QIC_CREATED_GND~I .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|~GND (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|~GND~combout = GND
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|~GND~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|~GND .lut_mask = 16'h0000;
|
|
defparam \auto_signaltap_0|~GND .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(\~QIC_CREATED_GND~I_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~1 .lut_mask = 16'hA080;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~2 .lut_mask = 16'hFF70;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0 .lut_mask = 16'h5050;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~3 (
|
|
.dataa(\altera_internal_jtag~TDIUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~2_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~3 .lut_mask = 16'hECCC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N5
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11]~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10]~4 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10]~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10]~4 .lut_mask = 16'hD8F0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10]~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10]~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~8 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~8 .lut_mask = 16'h0005;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 (
|
|
.dataa(\altera_internal_jtag~TMSUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 .lut_mask = 16'hA080;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~9 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~8_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~9 .lut_mask = 16'h88F0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y37_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [2]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 .lut_mask = 16'hCC00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N1
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~1 .lut_mask = 16'h0808;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2 .lut_mask = 16'h2808;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~12 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~12 .lut_mask = 16'hFA50;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y26_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\altera_internal_jtag~TMSUTAP ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 .lut_mask = 16'hC0C0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\altera_internal_jtag~TMSUTAP ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 .lut_mask = 16'h0555;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.datac(\altera_internal_jtag~TDIUTAP ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 .lut_mask = 16'hC4FF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 .lut_mask = 16'h5504;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 .lut_mask = 16'h4000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y41_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 .lut_mask = 16'hBAAA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y41_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4 .lut_mask = 16'hFAEA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y39_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N21
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~15 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~15 .lut_mask = 16'hF0CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~11 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~11 .lut_mask = 16'h8000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~11_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12 .lut_mask = 16'hCCEC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~19 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][3]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~19 .lut_mask = 16'hF5A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~27 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~27_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~27 .lut_mask = 16'h1B0A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~27 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~27_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28 .lut_mask = 16'h4000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y39_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [2]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 .lut_mask = 16'hEE44;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0 .lut_mask = 16'hFAFA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~10 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~10 .lut_mask = 16'h0400;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y38_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~7 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~7 .lut_mask = 16'hFCAC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~7_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8 .lut_mask = 16'h88C0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N3
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~5 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~5 .lut_mask = 16'hF0AA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~11 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][3]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~11 .lut_mask = 16'hF5A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 .lut_mask = 16'h2000;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N17
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~13 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~13 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N11
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~17 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~17 .lut_mask = 16'hFA0A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~9 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [0]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~9 .lut_mask = 16'hEE44;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N1
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~9_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7 .lut_mask = 16'h0040;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~8 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~8 .lut_mask = 16'h1504;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~8_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26 .lut_mask = 16'h0080;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N1
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y26_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 .lut_mask = 16'hFFAA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N19
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~14 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~14 .lut_mask = 16'hF0AA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N13
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~18 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~18 .lut_mask = 16'hFA0A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N5
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [1]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 .lut_mask = 16'hEE44;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6 .lut_mask = 16'h8800;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~1 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~1 .lut_mask = 16'h0C00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~5 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~1_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~5 .lut_mask = 16'h0002;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~4 .lut_mask = 16'h0030;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~7 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~6_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~5_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~4_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~7 .lut_mask = 16'hFCB0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~0 .lut_mask = 16'hF0AA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~6 .lut_mask = 16'hD8D8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N30
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 .lut_mask = 16'h0080;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~3 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~9 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~9 .lut_mask = 16'hFA50;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N3
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0 .lut_mask = 16'h000F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 .lut_mask = 16'hFFBF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 .lut_mask = 16'h43C3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y36_N17
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 .lut_mask = 16'h43F0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y36_N13
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 .lut_mask = 16'h52F0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y36_N23
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 .lut_mask = 16'h0080;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43 .lut_mask = 16'hFFEA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N3
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~17 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~16 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~17_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~17 .lut_mask = 16'h3C3F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~17 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N5
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~17_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~19 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~19_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~19 .lut_mask = 16'hC30C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~19 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N7
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~19_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~21 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~21_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~21 .lut_mask = 16'h3C3F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~21 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N9
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~21_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~23 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~23_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~23 .lut_mask = 16'hC30C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~23 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~25 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~25_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~25 .lut_mask = 16'h3C3F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~25 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N14
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~27 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~27_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~27 .lut_mask = 16'hC30C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~27 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~29 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~29_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~29 .lut_mask = 16'h5A5F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~29 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~31 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~31_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~31 .lut_mask = 16'hA50A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~31 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~33 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~33_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~33 .lut_mask = 16'h5A5F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~33 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~35 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~35_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~35 .lut_mask = 16'hA50A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~35 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~37 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~37_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~37 .lut_mask = 16'h5A5F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~37 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~39 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~39_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~39 .lut_mask = 16'hA50A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~39 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~41 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~41_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~41 .lut_mask = 16'h5A5F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~41 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N30
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 .lut_mask = 16'hA5A5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N31
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44_combout ),
|
|
.asdata(\altera_internal_jtag~TDIUTAP ),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N29
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~41_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N27
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~39_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N25
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~37_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N23
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~35_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N21
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~33_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N19
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~31_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N17
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~29_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N15
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~27_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N13
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~25_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y24_N11
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~23_combout ),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~43_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N25
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~17 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~17 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~21 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][5]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~21 .lut_mask = 16'hF5A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~21_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~15 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [4]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~15 .lut_mask = 16'hEE44;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y26_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N27
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~18 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~18 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~22 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][6]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~22 .lut_mask = 16'hAFA0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N3
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~22_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [5]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~16 .lut_mask = 16'hEE44;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~19 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~19 .lut_mask = 16'hCCAA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~23 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~23_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~23 .lut_mask = 16'hFA0A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~23 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N29
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~23_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y26_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N13
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~17 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~17 .lut_mask = 16'hDD88;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~20 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~20 .lut_mask = 16'hAAF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][8] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~24 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][8]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~24_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~24 .lut_mask = 16'hACAC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~24 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N7
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~24_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~18 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~18 .lut_mask = 16'hA280;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~18_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~21 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [9]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~21 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~21_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][9] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~25 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][9]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~25_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~25 .lut_mask = 16'hF5A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~25 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y39_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~25_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~19 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~19 .lut_mask = 16'h8C80;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~19_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9]~feeder_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8]~feeder_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [9]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~17_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N29
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~16_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~15_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 .lut_mask = 16'h00CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~16 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~16 .lut_mask = 16'hF0CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~20 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][4]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~20 .lut_mask = 16'hACAC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y26_N23
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]),
|
|
.clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~13 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~13 .lut_mask = 16'hA0C0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~14 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~13_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~14 .lut_mask = 16'hFCB8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y37_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4]~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5 .lut_mask = 16'hACAC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y36_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 .lut_mask = 16'h00F0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y36_N1
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~10 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~10 .lut_mask = 16'hCCF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N1
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[2][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~16 .lut_mask = 16'hFA0A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y37_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~28_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7]~5_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~6 .lut_mask = 16'hEE44;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y37_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~6_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~8_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0 .lut_mask = 16'h0003;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 .lut_mask = 16'h0F05;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal3~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 .lut_mask = 16'h5755;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 (
|
|
.dataa(\altera_internal_jtag~TDIUTAP ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .lut_mask = 16'hAAF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y36_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 (
|
|
.dataa(\altera_internal_jtag~TDIUTAP ),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 .lut_mask = 16'hAAF0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y36_N27
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 .lut_mask = 16'h0100;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~7 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~7 .lut_mask = 16'hF0CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N11
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~13 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][5]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~13 .lut_mask = 16'hAFA0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2] = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout &
|
|
// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] &
|
|
// (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] .lut_mask = 16'h8000;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X34_Y0_N29
|
|
fiftyfivenm_io_ibuf \clk_50~input (
|
|
.i(clk_50),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\clk_50~input_o ));
|
|
// synopsys translate_off
|
|
defparam \clk_50~input .bus_hold = "false";
|
|
defparam \clk_50~input .listen_to_nsleep_signal = "false";
|
|
defparam \clk_50~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: PLL_1
|
|
fiftyfivenm_pll \cpu_clk|altpll_component|auto_generated|pll1 (
|
|
.areset(gnd),
|
|
.pfdena(vcc),
|
|
.fbin(\cpu_clk|altpll_component|auto_generated|wire_pll1_fbout ),
|
|
.phaseupdown(gnd),
|
|
.phasestep(gnd),
|
|
.scandata(gnd),
|
|
.scanclk(gnd),
|
|
.scanclkena(vcc),
|
|
.configupdate(gnd),
|
|
.clkswitch(gnd),
|
|
.inclk({gnd,\clk_50~input_o }),
|
|
.phasecounterselect(3'b000),
|
|
.phasedone(),
|
|
.scandataout(),
|
|
.scandone(),
|
|
.activeclock(),
|
|
.locked(),
|
|
.vcooverrange(),
|
|
.vcounderrange(),
|
|
.fbout(\cpu_clk|altpll_component|auto_generated|wire_pll1_fbout ),
|
|
.clk(\cpu_clk|altpll_component|auto_generated|pll1_CLK_bus ),
|
|
.clkbad());
|
|
// synopsys translate_off
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .auto_settings = "false";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .bandwidth_type = "medium";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c0_high = 250;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c0_initial = 1;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c0_low = 250;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c0_mode = "even";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c0_ph = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c1_high = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c1_initial = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c1_low = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c1_mode = "bypass";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c1_ph = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c2_high = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c2_initial = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c2_low = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c2_mode = "bypass";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c2_ph = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c3_high = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c3_initial = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c3_low = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c3_mode = "bypass";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c3_ph = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c4_high = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c4_initial = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c4_low = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c4_mode = "bypass";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c4_ph = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk0_counter = "c0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk0_divide_by = 50;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk1_counter = "unused";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk1_divide_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk1_multiply_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk2_counter = "unused";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk2_divide_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk2_multiply_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk2_phase_shift = "0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk3_counter = "unused";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk3_divide_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk4_counter = "unused";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk4_divide_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .compensate_clock = "clock0";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .m = 10;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .m_initial = 1;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .m_ph = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .n = 1;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .operation_mode = "normal";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .pfd_max = 200000;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .pfd_min = 3076;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .simulation_type = "functional";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .switch_over_type = "auto";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_center = 1538;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_divide_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto";
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_max = 3333;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_min = 1538;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_multiply_by = 0;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 250;
|
|
defparam \cpu_clk|altpll_component|auto_generated|pll1 .vco_post_scale = 2;
|
|
// synopsys translate_on
|
|
|
|
// Location: CLKCTRL_G18
|
|
fiftyfivenm_clkctrl \cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl (
|
|
.ena(vcc),
|
|
.inclk({vcc,vcc,vcc,\cpu_clk|altpll_component|auto_generated|wire_pll1_clk [0]}),
|
|
.clkselect(2'b00),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.outclk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ));
|
|
// synopsys translate_off
|
|
defparam \cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock";
|
|
defparam \cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "falling edge";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X26_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_addr[14]~input (
|
|
.i(cpu_addr[14]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[14]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[14]~input .bus_hold = "false";
|
|
defparam \cpu_addr[14]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[14]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X22_Y0_N8
|
|
fiftyfivenm_io_ibuf \cpu_addr[13]~input (
|
|
.i(cpu_addr[13]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[13]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[13]~input .bus_hold = "false";
|
|
defparam \cpu_addr[13]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[13]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout = (\cpu_addr[14]~input_o & \cpu_addr[13]~input_o )
|
|
|
|
.dataa(\cpu_addr[14]~input_o ),
|
|
.datab(gnd),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2 .lut_mask = 16'hA0A0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 .lut_mask = 16'hF000;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X46_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_addr[0]~input (
|
|
.i(cpu_addr[0]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[0]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[0]~input .bus_hold = "false";
|
|
defparam \cpu_addr[0]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[0]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X40_Y0_N15
|
|
fiftyfivenm_io_ibuf \cpu_addr[1]~input (
|
|
.i(cpu_addr[1]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[1]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[1]~input .bus_hold = "false";
|
|
defparam \cpu_addr[1]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[1]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X36_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_addr[2]~input (
|
|
.i(cpu_addr[2]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[2]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[2]~input .bus_hold = "false";
|
|
defparam \cpu_addr[2]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[2]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X36_Y0_N8
|
|
fiftyfivenm_io_ibuf \cpu_addr[3]~input (
|
|
.i(cpu_addr[3]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[3]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[3]~input .bus_hold = "false";
|
|
defparam \cpu_addr[3]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[3]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X34_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_addr[4]~input (
|
|
.i(cpu_addr[4]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[4]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[4]~input .bus_hold = "false";
|
|
defparam \cpu_addr[4]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[4]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X20_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_addr[5]~input (
|
|
.i(cpu_addr[5]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[5]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[5]~input .bus_hold = "false";
|
|
defparam \cpu_addr[5]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[5]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X20_Y0_N8
|
|
fiftyfivenm_io_ibuf \cpu_addr[6]~input (
|
|
.i(cpu_addr[6]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[6]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[6]~input .bus_hold = "false";
|
|
defparam \cpu_addr[6]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[6]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X20_Y0_N29
|
|
fiftyfivenm_io_ibuf \cpu_addr[7]~input (
|
|
.i(cpu_addr[7]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[7]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[7]~input .bus_hold = "false";
|
|
defparam \cpu_addr[7]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[7]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X18_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_addr[8]~input (
|
|
.i(cpu_addr[8]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[8]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[8]~input .bus_hold = "false";
|
|
defparam \cpu_addr[8]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[8]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X24_Y0_N15
|
|
fiftyfivenm_io_ibuf \cpu_addr[9]~input (
|
|
.i(cpu_addr[9]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[9]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[9]~input .bus_hold = "false";
|
|
defparam \cpu_addr[9]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[9]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X24_Y0_N22
|
|
fiftyfivenm_io_ibuf \cpu_addr[10]~input (
|
|
.i(cpu_addr[10]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[10]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[10]~input .bus_hold = "false";
|
|
defparam \cpu_addr[10]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[10]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X18_Y0_N22
|
|
fiftyfivenm_io_ibuf \cpu_addr[11]~input (
|
|
.i(cpu_addr[11]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[11]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[11]~input .bus_hold = "false";
|
|
defparam \cpu_addr[11]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[11]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X22_Y0_N15
|
|
fiftyfivenm_io_ibuf \cpu_addr[12]~input (
|
|
.i(cpu_addr[12]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[12]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[12]~input .bus_hold = "false";
|
|
defparam \cpu_addr[12]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[12]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y23_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .mem_init3 = 2048'h57FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y20_N13
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2] = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout &
|
|
// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] &
|
|
// (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] .lut_mask = 16'h0800;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout = (!\cpu_addr[14]~input_o & \cpu_addr[13]~input_o )
|
|
|
|
.dataa(\cpu_addr[14]~input_o ),
|
|
.datab(gnd),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1 .lut_mask = 16'h5050;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y24_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14])
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 .lut_mask = 16'h0A0A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y22_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2] = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout &
|
|
// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] &
|
|
// (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] .lut_mask = 16'h0080;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout = (!\cpu_addr[13]~input_o & \cpu_addr[14]~input_o )
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(\cpu_addr[14]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0 .lut_mask = 16'h0F00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 .lut_mask = 16'h00F0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y15_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w[2] (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2] = (!\cpu_addr[14]~input_o & !\cpu_addr[13]~input_o )
|
|
|
|
.dataa(\cpu_addr[14]~input_o ),
|
|
.datab(gnd),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w[2] .lut_mask = 16'h0505;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w[2] .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout = (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 .lut_mask = 16'h000F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y14_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_first_bit_number = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE8C0A2075D220AD808422A14848C8442324A50505839ABAA0704911C140600704929EA42C8F3E0D1;
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y20_N31
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 ) # ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 & !\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 .lut_mask = 16'hF0AC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 )) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 ))))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 .lut_mask = 16'hBBC0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 .lut_mask = 16'h8000;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y23_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .mem_init3 = 2048'h03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y10_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y12_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE301AD1664DD9182270190064460000180031051AA1D33322200510880064220080463CAC5FBF25B;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N14
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 )) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 )))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 .lut_mask = 16'hFA0C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y13_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_first_bit_number = 3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 ) # ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 .lut_mask = 16'hBC8C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y24_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .mem_init3 = 2048'h57FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y17_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y20_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF82460B44C1022146018844696AB5AAAAC83732C169A22230AB295BE4ADF70AA6492627BE870E000;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y25_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_first_bit_number = 5;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 ) # (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 & ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 .lut_mask = 16'hAAE4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 )) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 ))))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 .lut_mask = 16'hDDA0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y16_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y22_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y17_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEEAF7AB5572BAB548D53355494EA52ABA92A5BAF56BEAAEA1AAD173FB39DC1AA9268ABEFC4F9F249;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 ) # ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 & !\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 .lut_mask = 16'hF0AC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y21_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_first_bit_number = 7;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .mem_init3 = 2048'hABFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 ) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 .lut_mask = 16'hE2CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 (
|
|
.dataa(\altera_internal_jtag~TDIUTAP ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 .lut_mask = 16'hF0E2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19 .lut_mask = 16'hEFEF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y20_N11
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y20_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE2F7880019080026308810442015AA805823BAF061400012494C100908A12484900415EC060C000;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y19_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N30
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 ) # (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 & ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 .lut_mask = 16'hF0CA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y24_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .mem_init3 = 2048'h03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y25_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_first_bit_number = 6;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 ) # ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 &
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 .lut_mask = 16'hD8AA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 .lut_mask = 16'hFE02;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y20_N1
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N14
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 .lut_mask = 16'hABA8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y20_N15
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y12_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFECA6328000224211084220420088022220210D865454000000808100908A0008400441C6C172E480;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y14_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 ))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 .lut_mask = 16'hF4A4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y9_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y18_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_first_bit_number = 4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .mem_init3 = 2048'h03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 )) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 )))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 .lut_mask = 16'hEA62;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 .lut_mask = 16'hFE02;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y16_N17
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 .lut_mask = 16'hABA8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y16_N23
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y16_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y19_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE84440011880284080000110800050C80108522C0830888821004114808242104800C842C5E3C6DB;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]) #
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 .lut_mask = 16'hB9A8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y21_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .mem_init3 = 2048'h57FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y15_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_first_bit_number = 2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 )) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 ))))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 .lut_mask = 16'hE6C4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 .lut_mask = 16'hFE02;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y16_N5
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y18_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .mem_init3 = 2048'h03FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y11_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y9_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y13_N0
|
|
fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 (
|
|
.portawe(gnd),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({vcc}),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}),
|
|
.portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1],
|
|
\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTADATAOUT_bus ),
|
|
.portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .clk0_core_clock_enable = "ena0";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .clk1_core_clock_enable = "ena1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .data_interleave_offset_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .data_interleave_width_in_bits = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .init_file = "../../sw/bootrom.hex";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .init_file_layout = "port_a";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_83c1:auto_generated|altsyncram_hmd2:altsyncram1|ALTSYNCRAM";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .operation_mode = "bidir_dual_port";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_byte_enable_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_address_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_address_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_address_width = 13;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_in_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_out_clear = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_out_clock = "none";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_width = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_first_address = 0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_first_bit_number = 1;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_last_address = 8191;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_logical_ram_depth = 32768;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_logical_ram_width = 8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_read_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_write_enable_clock = "clock1";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .ram_block_type = "M9K";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .mem_init3 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .mem_init2 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .mem_init1 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .mem_init0 = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE80561208101000004001188102054888104126C801750008904050290834890000440E2D366CF3E;
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 )) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 )))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 .lut_mask = 16'hFA0C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 )) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 ))))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 .lut_mask = 16'hAFC0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 .lut_mask = 16'hFE02;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y16_N19
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y16_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 .lut_mask = 16'hABA8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y16_N9
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0]~19_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~6 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 .lut_mask = 16'h33CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N14
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal .lut_mask = 16'hF000;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~6 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~8 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 .lut_mask = 16'h3C3F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y40_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 .lut_mask = 16'h0F00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 .lut_mask = 16'hDF20;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y40_N19
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~8 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~10 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 .lut_mask = 16'hC30C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y40_N21
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~10 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13_combout ),
|
|
.cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~14 ));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 .lut_mask = 16'h5A5F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y40_N23
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~14 ),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 .lut_mask = 16'hF00F;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y40_N25
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 .lut_mask = 16'h0F00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 .lut_mask = 16'hCC00;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 .lut_mask = 16'hBAAA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y40_N17
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 .lut_mask = 16'hCCC3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 .lut_mask = 16'h2080;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 .lut_mask = 16'h0333;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 .lut_mask = 16'hE0C0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N30
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 .lut_mask = 16'hF704;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11_combout ),
|
|
.datab(gnd),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 .lut_mask = 16'h5FFA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 .lut_mask = 16'h0102;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 (
|
|
.dataa(\altera_internal_jtag~TDIUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 .lut_mask = 16'h0888;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 .lut_mask = 16'hF0F8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N14
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 .lut_mask = 16'h03F0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 .lut_mask = 16'hEAAA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6 .lut_mask = 16'h57A8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y40_N25
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [3]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 .lut_mask = 16'h5101;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y40_N23
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 .lut_mask = 16'h02C3;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y40_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 .lut_mask = 16'h8008;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [2]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 .lut_mask = 16'hFF20;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y40_N29
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 .lut_mask = 16'hAEAA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y36_N25
|
|
dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1]~6_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] .is_wysiwyg = "true";
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_1~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 .lut_mask = 16'hA0E4;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 (
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 .lut_mask = 16'hFF0C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y38_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y38_N13
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 (
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 .lut_mask = 16'h2320;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~6 .lut_mask = 16'h0500;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y36_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~0 .lut_mask = 16'hFFF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y36_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: CLKCTRL_G13
|
|
fiftyfivenm_clkctrl \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl (
|
|
.ena(vcc),
|
|
.inclk({vcc,vcc,vcc,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~q }),
|
|
.clkselect(2'b00),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.outclk(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl .clock_type = "global clock";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl .ena_register_mode = "none";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~5 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.datac(\altera_internal_jtag~TDIUTAP ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~5 .lut_mask = 16'h8CFF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y39_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~5_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~6 .lut_mask = 16'h5510;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y39_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena .lut_mask = 16'h0080;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y22_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[173] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\altera_internal_jtag~TDIUTAP ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [173]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[173] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[173] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [173]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [172]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[172] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [172]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [171]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[171] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [171]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [170]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[170] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [170]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [169]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[169] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[168] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [169]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [168]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[168] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[168] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [168]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [167]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[167] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [167]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [166]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[166] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[165] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [166]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [165]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[165] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[165] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [165]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [164]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[164] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[163] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [164]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [163]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[163] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[163] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [163]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [162]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[162] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [162]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [161]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[161] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[160] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [161]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [160]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[160] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[160] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [160]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [159]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[159] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [159]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [158]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[158] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[157] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [158]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [157]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[157] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[157] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [157]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [156]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[156] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [156]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [155]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[155] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [155]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [154]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[154] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [154]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [153]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[153] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [153]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [152]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[152] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [152]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [151]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[151] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[150] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [151]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [150]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[150] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[150] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[149] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [150]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [149]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[149] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[149] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [149]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [148]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[148] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[147] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [148]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [147]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[147] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[147] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[146] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [147]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [146]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[146] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[146] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [146]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [145]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[145] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [145]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [144]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[144] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [144]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [143]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[143] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [143]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [142]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[142] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [142]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [141]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[141] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[140] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [141]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [140]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[140] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[140] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [140]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [139]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[139] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [139]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [138]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[138] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [138]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [137]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[137] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [137]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [136]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[136] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [136]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [135]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[135] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [135]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [134]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[134] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [134]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [133]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[133] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [133]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [132]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[132] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[131] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [132]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [131]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[131] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[131] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [131]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [130]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[130] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [130]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [129]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[129] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [129]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [128]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[128] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [128]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [127]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[127] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [127]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [126]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[126] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [126]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [125]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[125] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [125]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [124]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[124] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [124]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [123]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[123] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[122] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [123]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [122]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[122] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[122] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[121] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [122]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [121]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[121] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[121] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [121]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [120]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[120] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [120]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [119]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[119] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[118] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [119]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [118]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[118] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[118] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [118]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [117]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[117] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[116] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [117]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [116]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[116] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[116] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [116]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [115]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[115] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [115]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [114]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[114] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[113] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [114]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [113]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[113] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[113] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [113]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [112]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[112] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [112]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [111]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[111] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [111]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [110]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[110] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [110]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [109]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[109] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[108] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [109]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [108]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[108] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[108] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [108]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [107]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[107] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [107]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [106]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[106] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [106]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [105]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[105] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [105]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [104]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[104] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [104]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [103]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[103] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [103]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [102]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[102] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [102]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [101]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[101] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [101]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [100]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[100] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [100]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [99]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[99] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [99]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [98]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[98] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[97] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [98]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [97]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[97] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[97] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [97]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [96]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[96] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [96]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [95]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[95] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[94] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [95]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [94]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[94] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[94] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [94]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [93]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[93] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [93]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [92]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[92] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[91] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [92]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [91]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[91] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[91] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[90] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [91]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [90]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[90] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[90] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [90]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [89]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[89] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [89]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [88]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[88] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[87] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [88]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [87]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[87] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[87] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [87]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [86]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[86] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [86]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [85]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[85] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [85]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [84]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[84] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[83] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [84]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [83]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[83] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[83] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [83]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [82]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[82] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [82]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [81]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[81] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [81]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [80]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[80] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y18_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [80]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y18_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [79]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[79] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [79]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [78]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[78] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [78]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [77]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[77] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [77]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [76]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[76] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [76]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [75]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[75] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [75]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [74]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[74] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [74]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [73]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[73] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y22_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [73]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y22_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [72]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[72] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y22_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [72]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y22_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [71]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[71] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [71]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [70]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[70] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [70]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [69]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[69] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[68] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [69]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [68]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[68] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[68] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [68]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [67]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[67] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [67]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [66]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[66] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [66]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [65]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[65] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [65]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [64]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[64] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [64]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [63]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[63] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [63]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [62]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[62] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [62]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [61]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[61] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [61]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [60]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[60] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[59] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [60]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [59]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[59] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[59] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [59]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [58]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[58] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [58]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [57]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[56] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [57]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [56]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [56]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [55]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [55]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [54]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [54]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [53]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [53]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [52]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [52]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [51]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [51]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [50]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [50]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [49]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [49]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [48]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [48]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [47]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [47]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [46]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [46]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [45]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [45]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [44]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [44]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [43]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[42] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [43]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [42]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [42]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [41]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [41]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [40]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[39] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [40]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [39]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [39]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [38]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [38]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [37]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [37]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [36]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [36]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [35]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [35]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [34]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [34]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [33]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [33]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [32]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [32]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [31]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [31]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [30]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [30]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [29]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [29]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [28]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [28]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [27]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [27]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [26]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [26]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [25]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [25]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [24]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[23] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [24]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [23]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[22] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [23]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [22]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [22]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [21]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [21]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [20]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [19]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [18]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [16]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [15]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [14]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [13]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [10]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [9]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [2]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [0]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [7]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [6]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [1]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [2]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y33_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y33_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y35_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|trigger_config_deserialize|dffs [0]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y35_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y35_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [8]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y35_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [5]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [4]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [3]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [1]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|trigger_setup_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~10_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~11 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~10 .lut_mask = 16'h9988;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~12 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [2]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~11 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~12_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~13 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~12 .lut_mask = 16'hA55F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~12 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~14 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~13 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~14_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~15 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~14 .lut_mask = 16'h3C0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~14 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~16 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [4]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~15 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~16_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~17 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~16 .lut_mask = 16'hC33F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~16 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~18 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [5]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~17 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~18_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~19 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~18 .lut_mask = 16'h3C0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~18 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~20 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [6]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~19 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~20_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~21 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~20 .lut_mask = 16'hC33F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~20 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~22 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [7]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~21 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~22_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~23 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~22 .lut_mask = 16'h3C0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~22 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~24 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [8]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~23 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~24_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~25 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~24 .lut_mask = 16'hA55F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~24 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~26 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [9]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~25 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~26_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~27 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~26 .lut_mask = 16'h3C0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~26 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10]~28 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~27 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10]~28_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10]~28 .lut_mask = 16'h0F0F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10]~28 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y33_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0]~feeder .lut_mask = 16'hFFFF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y33_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y33_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y33_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y33_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y33_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y33_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y33_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~feeder .lut_mask = 16'hFFFF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9]~26_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8]~24_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~20 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [7]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~18 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~20_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~21 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~20 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~20 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~23 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [8]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~21 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~23_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~24 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~23 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~23 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~25 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~23_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~25_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~25 .lut_mask = 16'hA0A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~25 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [3]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data .lut_mask = 16'hCC00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y35_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~25_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~26 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [9]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~24 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~26_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~27 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~26 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~26 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~28 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~26_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~28_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~28 .lut_mask = 16'hF000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~28 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y35_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~28_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [9]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [8]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [9]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5 .lut_mask = 16'h1248;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [10]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [10]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7 .lut_mask = 16'h4800;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~0_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~1 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~0 .lut_mask = 16'h33CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter~0 .lut_mask = 16'hF510;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~1 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~2_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~3 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~2 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~2 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~4 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~4 .lut_mask = 16'hF000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y35_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [2]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~3 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~5_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~6 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~5 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~5 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~5_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~7 .lut_mask = 16'hA0A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~6 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~8_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~9 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~8 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~8 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~10 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~8_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~10 .lut_mask = 16'hF000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y35_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~11 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [4]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~9 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~11_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~12 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~11 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~11 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~13 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~11_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~13 .lut_mask = 16'hF000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [5]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~12 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~14_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~15 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~14 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~14 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~16 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~14_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~16 .lut_mask = 16'hA0A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~17 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [6]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~15 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~17_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~18 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~17 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~17 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~19 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~17_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~19 .lut_mask = 16'hA0A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y35_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~22 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~20_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~22 .lut_mask = 16'hF000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y35_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~22_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6]~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7]~22_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [7]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [6]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [7]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~3 .lut_mask = 16'h1248;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5]~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4]~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [5]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [5]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [4]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~2 .lut_mask = 16'h0660;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1]~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [0]),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~0 .lut_mask = 16'h1428;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2]~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3]~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [3]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [2]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~1 .lut_mask = 16'h1248;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y35_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~3_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~2_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0 .lut_mask = 16'h8080;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1 .lut_mask = 16'h88F8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9 .lut_mask = 16'h280A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0]~q ),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~1 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0 .lut_mask = 16'h33CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0 .lut_mask = 16'h4844;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1]~q ),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~1 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~3 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1 .lut_mask = 16'h6050;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2]~q ),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~3 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~5 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2 .lut_mask = 16'h6050;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3]~q ),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~5 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~7 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3 .lut_mask = 16'h280A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4]~q ),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~7 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~9 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4 .lut_mask = 16'h2822;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5]~q ),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~9 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~11 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5 .lut_mask = 16'h280A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6]~q ),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~11 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~13 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6 .lut_mask = 16'h280A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7]~q ),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~13 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~15 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7 .lut_mask = 16'h6050;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8]~q ),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~15 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~17 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8 .lut_mask = 16'h4844;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9]~q ),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~17 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18 .lut_mask = 16'h0FF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~8_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~14_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~12_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~10_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~1 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~2_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~4_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~0 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~18_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add2~16_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~2 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~2 .lut_mask = 16'h3310;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~2_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~2_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~3 .lut_mask = 16'h3032;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~0 .lut_mask = 16'hC000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0 .lut_mask = 16'h0C0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X29_Y0_N22
|
|
fiftyfivenm_io_ibuf \cpu_addr[15]~input (
|
|
.i(cpu_addr[15]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_addr[15]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_addr[15]~input .bus_hold = "false";
|
|
defparam \cpu_addr[15]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_addr[15]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N4
|
|
fiftyfivenm_lcell_comb \decode|hex_cs~0 (
|
|
// Equation(s):
|
|
// \decode|hex_cs~0_combout = (\cpu_addr[9]~input_o & (\cpu_addr[14]~input_o & (\cpu_addr[8]~input_o & \cpu_addr[13]~input_o )))
|
|
|
|
.dataa(\cpu_addr[9]~input_o ),
|
|
.datab(\cpu_addr[14]~input_o ),
|
|
.datac(\cpu_addr[8]~input_o ),
|
|
.datad(\cpu_addr[13]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\decode|hex_cs~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|hex_cs~0 .lut_mask = 16'h8000;
|
|
defparam \decode|hex_cs~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N30
|
|
fiftyfivenm_lcell_comb \decode|hex_cs~1 (
|
|
// Equation(s):
|
|
// \decode|hex_cs~1_combout = (\cpu_addr[12]~input_o & (\cpu_addr[10]~input_o & (\decode|hex_cs~0_combout & \cpu_addr[11]~input_o )))
|
|
|
|
.dataa(\cpu_addr[12]~input_o ),
|
|
.datab(\cpu_addr[10]~input_o ),
|
|
.datac(\decode|hex_cs~0_combout ),
|
|
.datad(\cpu_addr[11]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\decode|hex_cs~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|hex_cs~1 .lut_mask = 16'h8000;
|
|
defparam \decode|hex_cs~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N10
|
|
fiftyfivenm_lcell_comb \decode|LessThan2~1 (
|
|
// Equation(s):
|
|
// \decode|LessThan2~1_combout = (\cpu_addr[7]~input_o & (\cpu_addr[5]~input_o & (\cpu_addr[6]~input_o & \cpu_addr[4]~input_o )))
|
|
|
|
.dataa(\cpu_addr[7]~input_o ),
|
|
.datab(\cpu_addr[5]~input_o ),
|
|
.datac(\cpu_addr[6]~input_o ),
|
|
.datad(\cpu_addr[4]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\decode|LessThan2~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|LessThan2~1 .lut_mask = 16'h8000;
|
|
defparam \decode|LessThan2~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N2
|
|
fiftyfivenm_lcell_comb \decode|LessThan1~0 (
|
|
// Equation(s):
|
|
// \decode|LessThan1~0_combout = (!\cpu_addr[15]~input_o & ((!\decode|LessThan2~1_combout ) # (!\decode|hex_cs~1_combout )))
|
|
|
|
.dataa(\cpu_addr[15]~input_o ),
|
|
.datab(gnd),
|
|
.datac(\decode|hex_cs~1_combout ),
|
|
.datad(\decode|LessThan2~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\decode|LessThan1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|LessThan1~0 .lut_mask = 16'h0555;
|
|
defparam \decode|LessThan1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X14_Y0_N1
|
|
fiftyfivenm_io_ibuf \cpu_rwb~input (
|
|
.i(cpu_rwb),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_rwb~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_rwb~input .bus_hold = "false";
|
|
defparam \cpu_rwb~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_rwb~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N10
|
|
fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 (
|
|
// Equation(s):
|
|
// \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout = (\decode|LessThan1~0_combout & (!\cpu_rwb~input_o & (\cpu_addr[13]~input_o & \cpu_addr[14]~input_o )))
|
|
|
|
.dataa(\decode|LessThan1~0_combout ),
|
|
.datab(\cpu_rwb~input_o ),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(\cpu_addr[14]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 .lut_mask = 16'h2000;
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X31_Y0_N15
|
|
fiftyfivenm_io_ibuf \cpu_data[6]~input (
|
|
.i(cpu_data[6]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[6]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[6]~input .bus_hold = "false";
|
|
defparam \cpu_data[6]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[6]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y3_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a30 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[6]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a30_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_first_bit_number = 6;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y17_N27
|
|
dffeas \main_memory|altsyncram_component|auto_generated|address_reg_a[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[13]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[0] .is_wysiwyg = "true";
|
|
defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N26
|
|
fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 (
|
|
// Equation(s):
|
|
// \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout = (!\cpu_addr[14]~input_o & (!\cpu_rwb~input_o & (\cpu_addr[13]~input_o & !\cpu_addr[15]~input_o )))
|
|
|
|
.dataa(\cpu_addr[14]~input_o ),
|
|
.datab(\cpu_rwb~input_o ),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(\cpu_addr[15]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 .lut_mask = 16'h0010;
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y17_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a14 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[6]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a14_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_first_bit_number = 6;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N30
|
|
fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0 (
|
|
// Equation(s):
|
|
// \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout = (!\cpu_addr[14]~input_o & (!\cpu_rwb~input_o & (!\cpu_addr[13]~input_o & !\cpu_addr[15]~input_o )))
|
|
|
|
.dataa(\cpu_addr[14]~input_o ),
|
|
.datab(\cpu_rwb~input_o ),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(\cpu_addr[15]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0 .lut_mask = 16'h0001;
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y18_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a6 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[6]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a6_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_first_bit_number = 6;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N24
|
|
fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder (
|
|
// Equation(s):
|
|
// \main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder_combout = \cpu_addr[14]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[14]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y17_N25
|
|
dffeas \main_memory|altsyncram_component|auto_generated|address_reg_a[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\main_memory|altsyncram_component|auto_generated|address_reg_a[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[1] .is_wysiwyg = "true";
|
|
defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ) #
|
|
// ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout &
|
|
// !\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30 .lut_mask = 16'hAAD8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N16
|
|
fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 (
|
|
// Equation(s):
|
|
// \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout = (\cpu_addr[14]~input_o & (!\cpu_rwb~input_o & (!\cpu_addr[13]~input_o & !\cpu_addr[15]~input_o )))
|
|
|
|
.dataa(\cpu_addr[14]~input_o ),
|
|
.datab(\cpu_rwb~input_o ),
|
|
.datac(\cpu_addr[13]~input_o ),
|
|
.datad(\cpu_addr[15]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 .lut_mask = 16'h0002;
|
|
defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y16_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a22 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[6]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_first_bit_number = 6;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N14
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30_combout &
|
|
// ((\main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout & \main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~30_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31 .lut_mask = 16'hB8CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout ))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32 .lut_mask = 16'hFC0A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout )) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout ))))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout ))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~32_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33 .lut_mask = 16'hDDA0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout = (\decode|LessThan1~0_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31_combout )) # (!\decode|LessThan1~0_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33_combout )))
|
|
|
|
.dataa(\decode|LessThan1~0_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~31_combout ),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~33_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34 .lut_mask = 16'hDD88;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X35_Y19_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[51]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[51]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X35_Y19_N19
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[51] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [51]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [154]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [155]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [51]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [153]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~0 .lut_mask = 16'hAFB1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [51]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [155]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [51]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~1 .lut_mask = 16'h2AA2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[54] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_rwb~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [54]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [164]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [162]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [54]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [163]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [54]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [164]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [54]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~1 .lut_mask = 16'h4CC4;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y22_N16
|
|
fiftyfivenm_lcell_comb \cpu_phi2~0 (
|
|
// Equation(s):
|
|
// \cpu_phi2~0_combout = !\cpu_phi2~reg0_q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\cpu_phi2~reg0_q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\cpu_phi2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \cpu_phi2~0 .lut_mask = 16'h0F0F;
|
|
defparam \cpu_phi2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y22_N17
|
|
dffeas \cpu_phi2~reg0 (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\cpu_phi2~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\cpu_phi2~reg0_q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \cpu_phi2~reg0 .is_wysiwyg = "true";
|
|
defparam \cpu_phi2~reg0 .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X36_Y22_N25
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[53] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_phi2~reg0_q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [53]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [53]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [161]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [160]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [53]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [159]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y22_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [161]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [53]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y22_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout ))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37 .lut_mask = 16'hFC0A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37_combout & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~37_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38 .lut_mask = 16'hBC8C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X29_Y0_N15
|
|
fiftyfivenm_io_ibuf \cpu_data[7]~input (
|
|
.i(cpu_data[7]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[7]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[7]~input .bus_hold = "false";
|
|
defparam \cpu_data[7]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[7]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y28_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a7 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[7]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a7_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_first_bit_number = 7;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y26_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a15 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[7]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a15_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_first_bit_number = 7;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ) #
|
|
// (\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout &
|
|
// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35 .lut_mask = 16'hF0CA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y4_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a23 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[7]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_first_bit_number = 7;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y1_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a31 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[7]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_first_bit_number = 7;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35_combout &
|
|
// (\main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~35_combout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36 .lut_mask = 16'hE4AA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y17_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout = (\decode|LessThan1~0_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36_combout ))) # (!\decode|LessThan1~0_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38_combout ))
|
|
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~38_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~36_combout ),
|
|
.datad(\decode|LessThan1~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39 .lut_mask = 16'hF0CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y19_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[52]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[52]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y19_N17
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[52] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [52]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [158]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [157]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [52]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [156]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [52]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [52]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [158]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~1 .lut_mask = 16'h4C8C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:51:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:54:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:53:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:52:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout )) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout )))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17 .lut_mask = 16'hEE30;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17_combout &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~17_combout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18 .lut_mask = 16'hCAF0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X38_Y0_N8
|
|
fiftyfivenm_io_ibuf \cpu_data[3]~input (
|
|
.i(cpu_data[3]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[3]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[3]~input .bus_hold = "false";
|
|
defparam \cpu_data[3]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[3]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y5_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a27 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[3]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a27_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_first_bit_number = 3;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y11_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a3 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[3]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_first_bit_number = 3;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y27_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a11 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[3]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_bit_number = 3;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ) #
|
|
// (\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout &
|
|
// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15 .lut_mask = 16'hCCE2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y8_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a19 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[3]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_first_bit_number = 3;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N30
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15_combout &
|
|
// ((\main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout & \main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~15_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16 .lut_mask = 16'hB8CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout = (\decode|LessThan1~0_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16_combout ))) # (!\decode|LessThan1~0_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18_combout ))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~18_combout ),
|
|
.datab(\decode|LessThan1~0_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~16_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19 .lut_mask = 16'hE2E2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[48]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[48]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[48]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[48]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[48]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[48] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[48]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [48]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [144]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [145]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [48]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [146]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [48]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [48]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [146]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout ) #
|
|
// ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] &
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12 .lut_mask = 16'hCBC8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout ))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout )))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout
|
|
// ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~12_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13 .lut_mask = 16'hF838;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X40_Y0_N22
|
|
fiftyfivenm_io_ibuf \cpu_data[2]~input (
|
|
.i(cpu_data[2]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[2]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[2]~input .bus_hold = "false";
|
|
defparam \cpu_data[2]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[2]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X73_Y13_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a26 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[2]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_first_bit_number = 2;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y29_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a2 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[2]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_first_bit_number = 2;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y11_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a10 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[2]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_first_bit_number = 2;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10 .lut_mask = 16'hF2C2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y7_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a18 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[2]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a18_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_first_bit_number = 2;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N26
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10_combout &
|
|
// ((\main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & \main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~10_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11 .lut_mask = 16'hBC8C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout = (\decode|LessThan1~0_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11_combout ))) # (!\decode|LessThan1~0_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13_combout ))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~13_combout ),
|
|
.datab(\decode|LessThan1~0_combout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~11_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14 .lut_mask = 16'hE2E2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N31
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[47] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [47]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [141]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [142]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [47]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [143]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [47]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [47]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [143]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout ) #
|
|
// ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] &
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27 .lut_mask = 16'hCBC8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27_combout &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout & (\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~27_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28 .lut_mask = 16'hEC2C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X34_Y0_N22
|
|
fiftyfivenm_io_ibuf \cpu_data[5]~input (
|
|
.i(cpu_data[5]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[5]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[5]~input .bus_hold = "false";
|
|
defparam \cpu_data[5]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[5]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y26_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a13 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[5]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_first_bit_number = 5;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y7_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a5 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[5]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a5_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_first_bit_number = 5;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N20
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ) #
|
|
// ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout &
|
|
// !\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25 .lut_mask = 16'hCCB8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y3_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a29 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[5]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_first_bit_number = 5;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y6_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a21 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[5]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_first_bit_number = 5;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25_combout &
|
|
// ((\main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout & \main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~25_combout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26 .lut_mask = 16'hD8AA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout = (\decode|LessThan1~0_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26_combout ))) # (!\decode|LessThan1~0_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28_combout ))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~28_combout ),
|
|
.datab(\decode|LessThan1~0_combout ),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~26_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29 .lut_mask = 16'hEE22;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[50] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [50]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [50]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [150]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [151]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [50]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [152]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y19_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [152]),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [50]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y19_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X38_Y0_N15
|
|
fiftyfivenm_io_ibuf \cpu_data[4]~input (
|
|
.i(cpu_data[4]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[4]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[4]~input .bus_hold = "false";
|
|
defparam \cpu_data[4]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[4]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y8_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a20 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[4]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a20_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_first_bit_number = 4;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y10_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a12 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[4]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_first_bit_number = 4;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y27_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a4 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[4]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a4_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_first_bit_number = 4;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ) #
|
|
// ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout &
|
|
// !\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20 .lut_mask = 16'hCCB8;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X73_Y14_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a28 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[4]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a28_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_first_bit_number = 4;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N28
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20_combout &
|
|
// (\main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout & (\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~20_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21 .lut_mask = 16'hEC2C;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N30
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [0]) #
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout )))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout &
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22 .lut_mask = 16'hCEC2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22_combout &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout & (\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~22_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23 .lut_mask = 16'hEA4A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y14_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout = (\decode|LessThan1~0_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21_combout )) # (!\decode|LessThan1~0_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23_combout )))
|
|
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~21_combout ),
|
|
.datac(\decode|LessThan1~0_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~23_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24 .lut_mask = 16'hCFC0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[49]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[49]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[49]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[49]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[49]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N11
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[49] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[49]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [49]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [147]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [148]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [49]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [149]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [49]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [49]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [149]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y19_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y19_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:48:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:47:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:50:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:49:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~3 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X46_Y0_N8
|
|
fiftyfivenm_io_ibuf \cpu_data[1]~input (
|
|
.i(cpu_data[1]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[1]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[1]~input .bus_hold = "false";
|
|
defparam \cpu_data[1]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[1]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y2_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a25 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[1]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_first_bit_number = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y28_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a1 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[1]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_first_bit_number = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y12_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a9 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[1]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_first_bit_number = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N2
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ) #
|
|
// (\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout &
|
|
// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5 .lut_mask = 16'hCCE2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y14_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a17 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[1]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_first_bit_number = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N4
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5_combout &
|
|
// ((\main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout & \main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~5_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6 .lut_mask = 16'hB8CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout ) #
|
|
// (\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout &
|
|
// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7 .lut_mask = 16'hCCE2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N0
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7_combout &
|
|
// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~7_combout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8 .lut_mask = 16'hCAF0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N18
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout = (\decode|LessThan1~0_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6_combout )) # (!\decode|LessThan1~0_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8_combout )))
|
|
|
|
.dataa(gnd),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~6_combout ),
|
|
.datac(\decode|LessThan1~0_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~8_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9 .lut_mask = 16'hCFC0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[46]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[46]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[46]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[46]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[46]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N5
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[46] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[46]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [46]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [140]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [139]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [46]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [138]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [46]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [46]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [140]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[44] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[7]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [44]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [44]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [133]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [132]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [44]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [134]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [44]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [134]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[43]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[43]~feeder_combout = \cpu_data[6]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[6]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[43]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[43]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[43]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[43] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[43]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [43]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [129]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [130]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [43]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [131]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [43]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [43]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [131]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y18_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[45] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [45]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [45]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [136]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [137]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [45]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [135]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~0 .lut_mask = 16'hAFB1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y18_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [45]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [137]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y18_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y18_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:46:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:44:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:43:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:45:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~4 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X54_Y0_N29
|
|
fiftyfivenm_io_ibuf \cpu_sync~input (
|
|
.i(cpu_sync),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_sync~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_sync~input .bus_hold = "false";
|
|
defparam \cpu_sync~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_sync~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N23
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[55] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_sync~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [55]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [165]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [166]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [55]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [167]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [55]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [55]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [167]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X24_Y0_N29
|
|
fiftyfivenm_io_ibuf \cpu_vpb~input (
|
|
.i(cpu_vpb),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_vpb~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_vpb~input .bus_hold = "false";
|
|
defparam \cpu_vpb~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_vpb~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[56]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[56]~feeder_combout = \cpu_vpb~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_vpb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[56]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[56]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[56]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N5
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[56] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[56]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [56]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [170]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [169]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [56]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [168]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [56]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [170]),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [56]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~1 .lut_mask = 16'h70D0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X46_Y54_N29
|
|
fiftyfivenm_io_ibuf \rst_n~input (
|
|
.i(rst_n),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\rst_n~input_o ));
|
|
// synopsys translate_off
|
|
defparam \rst_n~input .bus_hold = "false";
|
|
defparam \rst_n~input .listen_to_nsleep_signal = "false";
|
|
defparam \rst_n~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[57]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[57]~feeder_combout = \rst_n~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\rst_n~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[57]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[57]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[57]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[57] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[57]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [57]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [57]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [173]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [171]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [57]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [172]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [57]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [173]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y22_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y22_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:55:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|run~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:56:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:57:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y22_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~3_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~4_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~5 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N31
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[29] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[2]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [29]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [29]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [88]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [89]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [29]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [87]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~0 .lut_mask = 16'hAFB1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [29]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [89]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[27]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[27]~feeder_combout = \cpu_addr[15]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[15]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[27]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[27]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[27]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[27] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[27]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [27]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [27]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [81]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [83]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [27]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [82]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~0 .lut_mask = 16'hFA1B;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [27]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [83]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N15
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[30] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[3]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [30]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [92]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [90]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [30]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [91]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [30]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [30]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [92]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~1 .lut_mask = 16'h2A8A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[28]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[28]~feeder_combout = \cpu_addr[1]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[1]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[28] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [28]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [84]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [85]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [28]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [86]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [28]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [28]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [86]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y6_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y6_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:29:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:27:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:30:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:28:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~9 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[40] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[3]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [40]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [122]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [120]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [40]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [121]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [40]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [40]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [122]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~1 .lut_mask = 16'h4C8C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[41] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[4]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [41]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [123]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [125]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [41]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [124]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~0 .lut_mask = 16'hFA1B;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [41]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [125]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [41]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~1 .lut_mask = 16'h2AA2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[42]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[42]~feeder_combout = \cpu_data[5]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[5]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[42]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[42]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[42]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[42] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[42]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [42]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [127]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [128]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [42]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [126]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~0 .lut_mask = 16'hAFB1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [42]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y7_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [128]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [42]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~1 .lut_mask = 16'h2AA2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y7_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[39]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[39]~feeder_combout = \cpu_data[2]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[2]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[39]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[39]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[39]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[39] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[39]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [39]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [39]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [119]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [118]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [39]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [117]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [119]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [39]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y4_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y4_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:40:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:41:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:42:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:39:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~6 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[31]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[31]~feeder_combout = \cpu_addr[4]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[4]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[31]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[31]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[31]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N5
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[31] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[31]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [31]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [31]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [93]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [95]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [31]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [94]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~0 .lut_mask = 16'hFA1B;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y4_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [31]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [95]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~1 .lut_mask = 16'h6F00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y4_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[34]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[34]~feeder_combout = \cpu_addr[7]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[7]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[34] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [34]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [103]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [102]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [34]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [104]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [34]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [34]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [104]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[32]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[32]~feeder_combout = \cpu_addr[5]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[5]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[32]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[32]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[32]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[32] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[32]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [32]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [32]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [98]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [97]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [32]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [96]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [98]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [32]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[33]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[33]~feeder_combout = \cpu_addr[6]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[6]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[33]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[33]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[33]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[33] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[33]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [33]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [33]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [101]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [100]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [33]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [99]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [33]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [101]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~1 .lut_mask = 16'h60F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y6_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y6_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:31:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:34:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:32:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:33:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~8 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[38]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[38]~feeder_combout = \cpu_data[1]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[1]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[38]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[38]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[38]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[38] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[38]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [38]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [38]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [114]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [115]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [38]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [116]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [116]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~0_combout ),
|
|
.datad(\auto_signaltap_0|acq_trigger_in_reg [38]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~1 .lut_mask = 16'h70B0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[35]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[35]~feeder_combout = \cpu_addr[8]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[8]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[35]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[35]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[35]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[35] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[35]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [35]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [105]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [106]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [35]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [107]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [35]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [35]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [107]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X51_Y0_N22
|
|
fiftyfivenm_io_ibuf \cpu_data[0]~input (
|
|
.i(cpu_data[0]),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_data[0]~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_data[0]~input .bus_hold = "false";
|
|
defparam \cpu_data[0]~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_data[0]~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[37] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[0]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [37]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [37]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [111]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [113]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [37]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [112]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~0 .lut_mask = 16'hFA1B;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [113]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [37]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~1 .lut_mask = 16'h7B00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y6_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[36]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[36]~feeder_combout = \cpu_addr[9]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[9]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[36]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[36]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[36]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N19
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[36] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[36]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [36]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [110]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [109]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [36]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [108]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [36]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y6_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [110]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [36]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~1 .lut_mask = 16'h4CC4;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y6_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:38:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:35:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:37:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:36:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~7 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y6_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~9_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~6_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~8_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~10 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N24
|
|
fiftyfivenm_lcell_comb \decode|LessThan2~0 (
|
|
// Equation(s):
|
|
// \decode|LessThan2~0_combout = (!\cpu_addr[2]~input_o & (!\cpu_addr[3]~input_o & !\cpu_addr[1]~input_o ))
|
|
|
|
.dataa(gnd),
|
|
.datab(\cpu_addr[2]~input_o ),
|
|
.datac(\cpu_addr[3]~input_o ),
|
|
.datad(\cpu_addr[1]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\decode|LessThan2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|LessThan2~0 .lut_mask = 16'h0003;
|
|
defparam \decode|LessThan2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N16
|
|
fiftyfivenm_lcell_comb \decode|hex_cs~2 (
|
|
// Equation(s):
|
|
// \decode|hex_cs~2_combout = (\cpu_addr[15]~input_o ) # (((!\decode|LessThan2~1_combout ) # (!\decode|hex_cs~1_combout )) # (!\decode|LessThan2~0_combout ))
|
|
|
|
.dataa(\cpu_addr[15]~input_o ),
|
|
.datab(\decode|LessThan2~0_combout ),
|
|
.datac(\decode|hex_cs~1_combout ),
|
|
.datad(\decode|LessThan2~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\decode|hex_cs~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|hex_cs~2 .lut_mask = 16'hBFFF;
|
|
defparam \decode|hex_cs~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N4
|
|
fiftyfivenm_lcell_comb \segs|_data~11 (
|
|
// Equation(s):
|
|
// \segs|_data~11_combout = (\cpu_addr[0]~input_o & (!\decode|hex_cs~2_combout & (!\cpu_rwb~input_o & \cpu_data[1]~input_o )))
|
|
|
|
.dataa(\cpu_addr[0]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_rwb~input_o ),
|
|
.datad(\cpu_data[1]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~11 .lut_mask = 16'h0200;
|
|
defparam \segs|_data~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N26
|
|
fiftyfivenm_lcell_comb \segs|_data[1][4]~10 (
|
|
// Equation(s):
|
|
// \segs|_data[1][4]~10_combout = ((!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & \cpu_addr[0]~input_o ))) # (!\rst_n~input_o )
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\rst_n~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data[1][4]~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][4]~10 .lut_mask = 16'h1F0F;
|
|
defparam \segs|_data[1][4]~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N5
|
|
dffeas \segs|_data[1][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][1] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N15
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][1]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [28]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [27]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [9]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [29]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [9]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [9]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [29]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N18
|
|
fiftyfivenm_lcell_comb \segs|_data~9 (
|
|
// Equation(s):
|
|
// \segs|_data~9_combout = (\cpu_addr[0]~input_o & (!\decode|hex_cs~2_combout & (!\cpu_rwb~input_o & \cpu_data[0]~input_o )))
|
|
|
|
.dataa(\cpu_addr[0]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_rwb~input_o ),
|
|
.datad(\cpu_data[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~9 .lut_mask = 16'h0200;
|
|
defparam \segs|_data~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N19
|
|
dffeas \segs|_data[1][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][0] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][0]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [8]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [25]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [24]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [8]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [26]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [8]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [26]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~1 .lut_mask = 16'h60F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N4
|
|
fiftyfivenm_lcell_comb \segs|_data~8 (
|
|
// Equation(s):
|
|
// \segs|_data~8_combout = (\cpu_data[7]~input_o & (!\decode|hex_cs~2_combout & (!\cpu_addr[0]~input_o & !\cpu_rwb~input_o )))
|
|
|
|
.dataa(\cpu_data[7]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_addr[0]~input_o ),
|
|
.datad(\cpu_rwb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~8 .lut_mask = 16'h0002;
|
|
defparam \segs|_data~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N0
|
|
fiftyfivenm_lcell_comb \segs|_data[0][6]~1 (
|
|
// Equation(s):
|
|
// \segs|_data[0][6]~1_combout = ((!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & !\cpu_addr[0]~input_o ))) # (!\rst_n~input_o )
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\rst_n~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data[0][6]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][6]~1 .lut_mask = 16'h0F1F;
|
|
defparam \segs|_data[0][6]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N5
|
|
dffeas \segs|_data[0][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][7] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][7]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [21]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [22]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [7]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [23]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [7]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [7]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [23]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N30
|
|
fiftyfivenm_lcell_comb \segs|_data~12 (
|
|
// Equation(s):
|
|
// \segs|_data~12_combout = (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & (\cpu_data[2]~input_o & \cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_data[2]~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~12 .lut_mask = 16'h1000;
|
|
defparam \segs|_data~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N31
|
|
dffeas \segs|_data[1][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][2] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N3
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][2]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [32]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [31]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [10]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [30]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [10]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [10]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [32]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y32_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y32_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~16 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:9:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:8:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:10:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~16 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N18
|
|
fiftyfivenm_lcell_comb \segs|_data~6 (
|
|
// Equation(s):
|
|
// \segs|_data~6_combout = (\cpu_data[5]~input_o & (!\decode|hex_cs~2_combout & (!\cpu_addr[0]~input_o & !\cpu_rwb~input_o )))
|
|
|
|
.dataa(\cpu_data[5]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_addr[0]~input_o ),
|
|
.datad(\cpu_rwb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~6 .lut_mask = 16'h0002;
|
|
defparam \segs|_data~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N19
|
|
dffeas \segs|_data[0][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][5] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y31_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][5]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [16]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [15]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [5]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [5]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [5]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N20
|
|
fiftyfivenm_lcell_comb \segs|_data~4 (
|
|
// Equation(s):
|
|
// \segs|_data~4_combout = (\cpu_data[3]~input_o & (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & !\cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_data[3]~input_o ),
|
|
.datab(\cpu_rwb~input_o ),
|
|
.datac(\decode|hex_cs~2_combout ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~4 .lut_mask = 16'h0002;
|
|
defparam \segs|_data~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N21
|
|
dffeas \segs|_data[0][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][3] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][3]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [3]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [11]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [9]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N0
|
|
fiftyfivenm_lcell_comb \segs|_data~5 (
|
|
// Equation(s):
|
|
// \segs|_data~5_combout = (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & (!\cpu_addr[0]~input_o & \cpu_data[4]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_addr[0]~input_o ),
|
|
.datad(\cpu_data[4]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~5 .lut_mask = 16'h0100;
|
|
defparam \segs|_data~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N1
|
|
dffeas \segs|_data[0][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][4] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N23
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][4]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [4]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [12]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [14]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [4]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [13]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0 .lut_mask = 16'hFA1B;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [4]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [14]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1 .lut_mask = 16'h6F00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N28
|
|
fiftyfivenm_lcell_comb \segs|_data~7 (
|
|
// Equation(s):
|
|
// \segs|_data~7_combout = (\cpu_data[6]~input_o & (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & !\cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_data[6]~input_o ),
|
|
.datab(\cpu_rwb~input_o ),
|
|
.datac(\decode|hex_cs~2_combout ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~7 .lut_mask = 16'h0002;
|
|
defparam \segs|_data~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N29
|
|
dffeas \segs|_data[0][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][6] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[6]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[6]~feeder_combout = \segs|_data[0][6]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [19]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [18]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [6]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [20]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [6]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y29_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [6]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [20]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y29_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y29_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~17 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~17 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N26
|
|
fiftyfivenm_lcell_comb \segs|_data~2 (
|
|
// Equation(s):
|
|
// \segs|_data~2_combout = (\cpu_data[1]~input_o & (!\decode|hex_cs~2_combout & (!\cpu_addr[0]~input_o & !\cpu_rwb~input_o )))
|
|
|
|
.dataa(\cpu_data[1]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_addr[0]~input_o ),
|
|
.datad(\cpu_rwb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~2 .lut_mask = 16'h0002;
|
|
defparam \segs|_data~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N27
|
|
dffeas \segs|_data[0][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][1] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[1]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[1]~feeder_combout = \segs|_data[0][1]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [4]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [3]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [1]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N16
|
|
fiftyfivenm_lcell_comb \segs|_data~0 (
|
|
// Equation(s):
|
|
// \segs|_data~0_combout = (!\cpu_addr[0]~input_o & (!\decode|hex_cs~2_combout & (\cpu_data[0]~input_o & !\cpu_rwb~input_o )))
|
|
|
|
.dataa(\cpu_addr[0]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_data[0]~input_o ),
|
|
.datad(\cpu_rwb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~0 .lut_mask = 16'h0010;
|
|
defparam \segs|_data~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N17
|
|
dffeas \segs|_data[0][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][0] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[0]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[0]~feeder_combout = \segs|_data[0][0]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N23
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [2]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0 .lut_mask = 16'hFA1B;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [0]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1 .lut_mask = 16'h4C8C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N8
|
|
fiftyfivenm_lcell_comb \segs|_data~3 (
|
|
// Equation(s):
|
|
// \segs|_data~3_combout = (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & (\cpu_data[2]~input_o & !\cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_data[2]~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~3 .lut_mask = 16'h0010;
|
|
defparam \segs|_data~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N9
|
|
dffeas \segs|_data[0][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[0][6]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[0][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[0][2] .is_wysiwyg = "true";
|
|
defparam \segs|_data[0][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N15
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][2]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [2]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [7]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [8]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0 .lut_mask = 16'hAFB1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [8]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1 .lut_mask = 16'h7B00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y32_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~18 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~18 .lut_mask = 16'h8800;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[26]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[26]~feeder_combout = \cpu_addr[14]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[14]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[26]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[26]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[26]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N25
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[26] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[26]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [26]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [26]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [80]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [79]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [26]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [78]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [80]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [26]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[24]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[24]~feeder_combout = \cpu_addr[12]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[12]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[24]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[24]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[24]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N5
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[24] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[24]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [24]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [74]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [72]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [24]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [73]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [24]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|acq_trigger_in_reg [24]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [74]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N23
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[25] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[13]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [25]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [77]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [76]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [25]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [75]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [25]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [25]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [77]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y18_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[23]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[23]~feeder_combout = \cpu_addr[11]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[11]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[23]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[23]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[23]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N23
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[23] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[23]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [23]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [23]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [71]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [69]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [23]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [70]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~0 .lut_mask = 16'hFC1D;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [71]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [23]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y18_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~11 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:26:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:24:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:25:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:23:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~11 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N2
|
|
fiftyfivenm_lcell_comb \segs|_data~14 (
|
|
// Equation(s):
|
|
// \segs|_data~14_combout = (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & (\cpu_data[4]~input_o & \cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_data[4]~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~14 .lut_mask = 16'h1000;
|
|
defparam \segs|_data~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N3
|
|
dffeas \segs|_data[1][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][4] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[12]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[12]~feeder_combout = \segs|_data[1][4]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [12]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [36]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [37]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [12]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [38]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [12]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [38]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~1 .lut_mask = 16'h7B00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N28
|
|
fiftyfivenm_lcell_comb \segs|_data~15 (
|
|
// Equation(s):
|
|
// \segs|_data~15_combout = (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & (\cpu_data[5]~input_o & \cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_data[5]~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~15 .lut_mask = 16'h1000;
|
|
defparam \segs|_data~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N29
|
|
dffeas \segs|_data[1][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][5] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[13]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[13]~feeder_combout = \segs|_data[1][5]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][5]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[13]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[13]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[13]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[13]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [40]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [39]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [13]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [41]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [13]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [13]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [41]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N24
|
|
fiftyfivenm_lcell_comb \segs|_data~13 (
|
|
// Equation(s):
|
|
// \segs|_data~13_combout = (!\cpu_rwb~input_o & (!\decode|hex_cs~2_combout & (\cpu_data[3]~input_o & \cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_data[3]~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~13 .lut_mask = 16'h1000;
|
|
defparam \segs|_data~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N25
|
|
dffeas \segs|_data[1][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][3] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[11]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[11]~feeder_combout = \segs|_data[1][3]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[11]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[11]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[11]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[11]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [34]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [33]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [11]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [35]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [11]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y32_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [11]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [35]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y32_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N14
|
|
fiftyfivenm_lcell_comb \segs|_data~16 (
|
|
// Equation(s):
|
|
// \segs|_data~16_combout = (\cpu_data[6]~input_o & (!\decode|hex_cs~2_combout & (!\cpu_rwb~input_o & \cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_data[6]~input_o ),
|
|
.datab(\decode|hex_cs~2_combout ),
|
|
.datac(\cpu_rwb~input_o ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~16 .lut_mask = 16'h0200;
|
|
defparam \segs|_data~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N15
|
|
dffeas \segs|_data[1][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][6] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N27
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][6]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [43]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [42]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [14]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [44]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [14]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|acq_trigger_in_reg [14]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|holdff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [44]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~1 .lut_mask = 16'h48CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y33_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y33_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:12:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:13:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:11:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:14:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~14 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[22]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[22]~feeder_combout = \cpu_addr[10]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[10]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[22]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[22]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[22]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N29
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[22] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[22]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [22]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [66]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [67]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [22]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [68]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [22]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [22]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [68]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_rwb~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [60]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [61]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [20]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [62]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [20]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [20]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [62]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[21]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[21]~feeder_combout = \cpu_addr[0]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[21]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[21]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[21]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[21] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[21]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [21]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [65]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [64]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [21]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [63]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~0 .lut_mask = 16'hCFD1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [21]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y22_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [21]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [65]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y22_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N24
|
|
fiftyfivenm_lcell_comb \rst_n~_wirecell (
|
|
// Equation(s):
|
|
// \rst_n~_wirecell_combout = !\rst_n~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\rst_n~input_o ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\rst_n~_wirecell_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \rst_n~_wirecell .lut_mask = 16'h0F0F;
|
|
defparam \rst_n~_wirecell .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[19]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[19]~feeder_combout = \rst_n~_wirecell_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\rst_n~_wirecell_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[19]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[19]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[19]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N15
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[19]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [57]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [58]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [19]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [59]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [19]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [59]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [19]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~1 .lut_mask = 16'h2AA2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y26_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~12 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:22:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:20:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:21:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:19:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~12 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N16
|
|
fiftyfivenm_lcell_comb \segs|_data~17 (
|
|
// Equation(s):
|
|
// \segs|_data~17_combout = (!\cpu_rwb~input_o & (\cpu_data[7]~input_o & (!\decode|hex_cs~2_combout & \cpu_addr[0]~input_o )))
|
|
|
|
.dataa(\cpu_rwb~input_o ),
|
|
.datab(\cpu_data[7]~input_o ),
|
|
.datac(\decode|hex_cs~2_combout ),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\segs|_data~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|_data~17 .lut_mask = 16'h0400;
|
|
defparam \segs|_data~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y31_N17
|
|
dffeas \segs|_data[1][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\segs|_data~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\segs|_data[1][4]~10_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\segs|_data[1][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \segs|_data[1][7] .is_wysiwyg = "true";
|
|
defparam \segs|_data[1][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[15]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[15]~feeder_combout = \segs|_data[1][7]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[15]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[15]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[15]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N9
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[15]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [45]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [46]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [15]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [47]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~0 .lut_mask = 16'hCADB;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [15]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [47]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [15]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|holdff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~1 .lut_mask = 16'h2AA2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N8
|
|
fiftyfivenm_lcell_comb \decode|hex_cs~2_wirecell (
|
|
// Equation(s):
|
|
// \decode|hex_cs~2_wirecell_combout = !\decode|hex_cs~2_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\decode|hex_cs~2_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\decode|hex_cs~2_wirecell_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \decode|hex_cs~2_wirecell .lut_mask = 16'h0F0F;
|
|
defparam \decode|hex_cs~2_wirecell .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N31
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\decode|hex_cs~2_wirecell_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [18]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [55]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [54]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [18]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [56]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [56]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [18]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~1 .lut_mask = 16'h7D00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[16]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[16]~feeder_combout = \cpu_addr[0]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N15
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [49]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [48]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [16]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [50]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [16]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [16]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [50]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_trigger_in_reg[17]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_trigger_in_reg[17]~feeder_combout = GLOBAL(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_trigger_in_reg[17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N31
|
|
dffeas \auto_signaltap_0|acq_trigger_in_reg[17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_trigger_in_reg[17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_trigger_in_reg [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_trigger_in_reg[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [52]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [51]),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [17]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [53]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~0 .lut_mask = 16'hACBD;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_trigger_in_reg [17]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|holdff~q ),
|
|
.datac(\auto_signaltap_0|acq_trigger_in_reg [17]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs [53]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~1 .lut_mask = 16'h28AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y29_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|p_match_out~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y29_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:15:sm1|regoutff~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:18:sm1|regoutff~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:16:sm1|regoutff~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_modules_gen:0:trigger_match|gen_sbpmg_pipeline_less_than_two:sm0:17:sm1|regoutff~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~13 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y26_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~15 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~11_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~14_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~12_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~13_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~15 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y28_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~19 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~16_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~17_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~18_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~15_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~19 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y29_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~20 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~5_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~10_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~19_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~20 .lut_mask = 16'hEAAA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|last_level_delayed~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|ela_control|builtin:ela_trigger_flow_mgr_entity|trigger_config_deserialize|dffs [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0 .lut_mask = 16'h4455;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [3]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4 .lut_mask = 16'h8800;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10]~28_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|modified_post_count [10]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~5_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [10]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6 .lut_mask = 16'h4848;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1 .lut_mask = 16'hF007;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y35_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~29 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [10]),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~27 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~29_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~29 .lut_mask = 16'hF00F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~29 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~31 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[3]~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~29_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~31_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~31 .lut_mask = 16'hA0A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~31 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y35_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Add3~31_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [10]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [9]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~2 .lut_mask = 16'h0003;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [4]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [6]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [5]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~1 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [3]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [1]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|counter [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~0 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~2_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~1_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3 .lut_mask = 16'h8800;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~4_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~1 .lut_mask = 16'hF8F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|collecting_post_data_var~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|done~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|collecting_post_data_var~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|collecting_post_data_var~0 .lut_mask = 16'h0011;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|collecting_post_data_var~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|collecting_post_data_var~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0 .lut_mask = 16'hFFF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0 .lut_mask = 16'h2000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~0 .lut_mask = 16'h00FF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0 .lut_mask = 16'h0C0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1 .lut_mask = 16'hAAA8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y40_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0 .lut_mask = 16'h0C00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0 .lut_mask = 16'hC3F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:base_address[0]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~16 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datac(\altera_internal_jtag~TDIUTAP ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~16 .lut_mask = 16'h5070;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0 .lut_mask = 16'h00A8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1 .lut_mask = 16'hAAA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~15 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [16]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~15 .lut_mask = 16'h02AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [15]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~14 .lut_mask = 16'h444C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [14]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~13 .lut_mask = 16'h444C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~12 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [13]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~12 .lut_mask = 16'h444C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~11 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [12]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~11 .lut_mask = 16'h02AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~10 .lut_mask = 16'h5700;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~9 .lut_mask = 16'h5700;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [9]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~8 .lut_mask = 16'h444C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~7 .lut_mask = 16'h5700;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [7]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~6 .lut_mask = 16'h444C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [6]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~5 .lut_mask = 16'h02AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~4 .lut_mask = 16'hF780;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y39_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~3 .lut_mask = 16'h444C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y39_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~1_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [3]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~2 .lut_mask = 16'hACAC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|state_status[2]~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~1 .lut_mask = 16'h2F20;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:collecting_post_data_var~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_load_on~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~0 .lut_mask = 16'h8F80;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y36_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|_~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~0 (
|
|
.dataa(gnd),
|
|
.datab(\altera_internal_jtag~TDIUTAP ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~0 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y38_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_register|dffs [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|status_shift_enable~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|bypass_reg_out~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~5 .lut_mask = 16'hBF80;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y36_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|run~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|condition_delay_reg [3]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0 .lut_mask = 16'h0008;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr .lut_mask = 16'hDDFF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y35_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[0]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[0]~feeder_combout = \segs|_data[0][0]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N7
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][0]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y34_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[0]~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0]~feeder .lut_mask = 16'hF0F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[3]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[4]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[5]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[6]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[8]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y35_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:next_address[9]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0 .lut_mask = 16'h55AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset .lut_mask = 16'hFFBF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0 .lut_mask = 16'h33CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y36_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita3~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y36_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [5]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita4~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y36_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~0 .lut_mask = 16'h0F0F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~0 .lut_mask = 16'h0080;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1 .lut_mask = 16'hC4CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita5~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0 .lut_mask = 16'hF0FF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y36_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita0~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y36_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita1~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y36_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_comb_bita2~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[5]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0 .lut_mask = 16'h4000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y36_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal0~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|adv_point_3_and_more:advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena .lut_mask = 16'hFF02;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita0~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita1~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita2~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita3~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita4~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita5~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita6~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita7~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita9 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9]),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita8~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita9~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita9 .lut_mask = 16'h0FF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita9 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_comb_bita9~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y32_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[1]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[1]~feeder_combout = \segs|_data[0][1]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y32_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[2]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[2]~feeder_combout = \segs|_data[0][2]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][2]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y32_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[3]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[3]~feeder_combout = \segs|_data[0][3]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N27
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [3]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][3]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y32_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y32_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N11
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][4]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y31_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N17
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[0][5]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][5]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][5]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][5]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[6]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[6]~feeder_combout = \segs|_data[0][6]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][6]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X43_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[7]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[7]~feeder_combout = \segs|_data[0][7]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[0][7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X43_Y34_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][7]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[8]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[8]~feeder_combout = \segs|_data[1][0]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N11
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][8]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][8]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][8]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y34_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][8]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][7]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][6]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][5]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][4]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][3]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][2]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][1]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][0]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N27
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\decode|hex_cs~2_wirecell_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [18]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][18]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][18]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][18]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][18]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][18]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[19]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[19]~feeder_combout = \rst_n~_wirecell_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\rst_n~_wirecell_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[19]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[19]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[19]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[19]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [19]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][19]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][19]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][19]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][19]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[20]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[20]~feeder_combout = \cpu_rwb~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_rwb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[20]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[20]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[20]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y32_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[20]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [20]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][20]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][20]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][20]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][20]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[21]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[21]~feeder_combout = \cpu_addr[0]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[21]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[21]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[21]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N11
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[21] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[21]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [21]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [21]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][21]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][21] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][21]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][21]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][21]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[22]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[22]~feeder_combout = \cpu_addr[10]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[10]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[22]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[22]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[22]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[22] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[22]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [22]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [22]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][22] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][22]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][22]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][22]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][22]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y29_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[23]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[23]~feeder_combout = \cpu_addr[11]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[11]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[23]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[23]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[23]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y29_N5
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[23] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[23]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [23]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][23] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [23]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][23]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][23] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][23]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][23]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][23]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][23] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][23]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][23]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N27
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[24] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[12]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [24]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][24] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [24]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][24]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][24]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][24]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][24]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[25]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[25]~feeder_combout = \cpu_addr[13]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[13]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[25]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[25]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[25]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N21
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[25] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[25]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [25]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [25]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][25]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][25]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y9_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][25]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y9_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N29
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[26] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[14]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [26]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [26]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][26]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][26]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y16_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][26]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y16_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y32_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][26]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][25]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][24]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][23]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][22]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][21]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][20]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][19]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][18]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_first_bit_number = 18;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_first_bit_number = 18;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[27]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[27]~feeder_combout = \cpu_addr[15]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[15]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[27]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[27]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[27]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N15
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[27] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[27]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [27]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][27] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [27]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][27]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][27]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y16_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][27]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y16_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y32_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][27]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y32_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[28]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[28]~feeder_combout = \cpu_addr[1]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[1]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[28] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [28]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [28]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][28]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][28]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][28]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y32_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[29]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[29]~feeder_combout = \cpu_addr[2]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[2]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[29]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[29]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[29]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N29
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[29] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[29]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [29]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [29]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][29]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y27_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][29]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y27_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y32_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][29] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][29]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][29]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[30]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[30]~feeder_combout = \cpu_addr[3]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[3]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[30]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[30]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[30]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N11
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[30] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[30]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [30]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [30]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][30]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][30]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y25_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][30]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y25_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y29_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[31]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[31]~feeder_combout = \cpu_addr[4]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[4]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[31]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[31]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[31]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[31] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[31]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [31]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y29_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [31]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][31] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][31]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][31]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][31] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][31]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][31]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y29_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][31]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N11
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[32] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[5]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [32]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y29_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [32]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y29_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][32]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y29_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][32]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y29_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y32_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][32]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[33]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[33]~feeder_combout = \cpu_addr[6]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[6]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[33]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[33]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[33]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[33] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[33]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [33]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [33]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][33]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][33]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][33] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][33]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][33]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[34]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[34]~feeder_combout = \cpu_addr[7]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[7]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N17
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[34] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [34]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [34]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][34]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][34]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y6_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][34]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y6_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[35]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[35]~feeder_combout = \cpu_addr[8]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[8]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[35]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[35]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[35]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N11
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[35] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[35]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [35]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [35]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][35] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][35]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][35]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][35]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X29_Y29_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][35]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X29_Y29_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y32_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][35]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][34]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][33]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][32]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][31]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][30]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][29]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][28]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][27]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_first_bit_number = 27;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_first_bit_number = 27;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N23
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[36] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_addr[9]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [36]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][36] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [36]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][36]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][36] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][36]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][36]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y9_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][36]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y9_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X36_Y13_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][36] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][36]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][36]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[37]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[37]~feeder_combout = \cpu_data[0]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[37]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[37]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[37]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[37] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[37]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [37]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [37]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][37]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][37]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][37] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][37]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][37]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[38] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[1]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [38]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y29_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [38]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y29_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][38]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y29_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][38]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X38_Y33_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][38]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X38_Y33_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y29_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[39]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[39]~feeder_combout = \cpu_data[2]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[2]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[39]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[39]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[39]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N27
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[39] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[39]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [39]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][39] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [39]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][39]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y29_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][39]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y29_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][39]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y29_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y33_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][39]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y33_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[40]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[40]~feeder_combout = \cpu_data[3]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[3]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[40]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[40]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[40]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[40] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[40]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [40]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [40]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][40]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][40] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][40]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][40]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][40]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[41]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[41]~feeder_combout = \cpu_data[4]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[4]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[41]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[41]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[41]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N29
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[41] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[41]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [41]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [41]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][41]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][41]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y31_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y31_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][41]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y31_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N9
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[42] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[5]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [42]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][42] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [42]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][42]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][42] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][42]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][42]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][42] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][42]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][42]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y33_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][42]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[43] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_data[6]~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [43]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y33_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [43]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y33_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][43]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y33_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][43]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y33_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][43]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y33_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y27_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[44]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[44]~feeder_combout = \cpu_data[7]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_data[7]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[44]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[44]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[44]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y27_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[44] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[44]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [44]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y27_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [44]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y27_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y27_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][44]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y27_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y27_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][44]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y27_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y27_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][44]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y27_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y33_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][44]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][43]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][42]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][41]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][40]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][39]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][38]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][37]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][36]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_first_bit_number = 36;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_first_bit_number = 36;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N17
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[45] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [45]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [45]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][45] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][45]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][45]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][45]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][45]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[46]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[46]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[1]~9_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[46]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[46]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[46]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[46] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[46]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [46]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [46]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][46] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][46]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][46]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][46]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][46]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X40_Y20_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[47]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[47]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[2]~14_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[47]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[47]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[47]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X40_Y20_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[47] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[47]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [47]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [47]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][47]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][47]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][47]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N17
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[48] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[3]~19_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [48]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [48]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][48]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][48]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][48]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[49]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[49]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[4]~24_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[49]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[49]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[49]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[49] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[49]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [49]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [49]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][49] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][49]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][49]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][49] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][49]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][49]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X39_Y27_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][49]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X39_Y27_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y19_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[50]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[50]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[5]~29_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[50]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[50]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[50]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y19_N17
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[50] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[50]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [50]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [50]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][50]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y23_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][50]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y23_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][50] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][50]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][50]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X35_Y19_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[51]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[51]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[6]~34_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X35_Y19_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[51] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [51]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [51]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][51]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][51]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y30_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][51]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y30_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y22_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[52]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[52]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[7]~39_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y22_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[52] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [52]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y22_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [52]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y22_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y22_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][52]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y22_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y22_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][52]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y22_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y22_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][52]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y22_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y22_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[53]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[53]~feeder_combout = \cpu_phi2~reg0_q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_phi2~reg0_q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[53]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[53]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[53]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y22_N27
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[53] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[53]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [53]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y22_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][53] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [53]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][53]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y22_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][53]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y22_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y22_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][53]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y22_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y22_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][53]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y22_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y30_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][53]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][52]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][51]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][50]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][49]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][48]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][47]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][46]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][45]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_first_bit_number = 45;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_first_bit_number = 45;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[54]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[54]~feeder_combout = \cpu_rwb~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_rwb~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[54]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[54]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[54]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N21
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[54] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[54]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [54]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [54]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][54] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][54]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][54]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][54]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X34_Y31_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][54]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X34_Y31_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[55]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[55]~feeder_combout = \cpu_sync~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_sync~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[55]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[55]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[55]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[55] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[55]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [55]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [55]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][55]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][55]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][55] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][55]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][55]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N27
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[56] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\cpu_vpb~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [56]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][56] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [56]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][56]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][56]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][56]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X31_Y23_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][56]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X31_Y23_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N21
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[57] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\rst_n~input_o ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [57]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [57]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][57] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][57]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][57]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y29_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][57]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y29_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X41_Y31_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][57] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][57]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][57]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y31_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({gnd,gnd,gnd,gnd,gnd,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][57]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][56]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][55]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][54]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_first_bit_number = 54;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_first_bit_number = 54;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~57 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a57 ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~57_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~57 .lut_mask = 16'hFAFA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~57 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[57] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~57_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [57]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[57] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[57] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~56 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [57]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a56 ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~56_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~56 .lut_mask = 16'hD8D8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~56 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[56] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~56_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [56]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[56] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[56] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~55 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a55 ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [56]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~55_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~55 .lut_mask = 16'hCACA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~55 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[55] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~55_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [55]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[55] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[55] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~54 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a54~portbdataout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [55]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~54_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~54 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~54 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[54] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~54_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [54]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[54] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[54] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~53 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a53 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [54]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~53_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~53 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~53 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[53] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~53_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [53]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[53] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[53] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~52 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a52 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [53]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~52_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~52 .lut_mask = 16'hE4E4;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~52 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[52] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~52_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [52]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[52] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[52] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~51 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a51 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [52]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~51_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~51 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~51 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[51] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~51_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [51]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[51] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[51] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~50 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a50 ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [51]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~50_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~50 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~50 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[50] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~50_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [50]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[50] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[50] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~49 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a49 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [50]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~49_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~49 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~49 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[49] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~49_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [49]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[49] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[49] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~48 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a48 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [49]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~48_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~48 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~48 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[48] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~48_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [48]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[48] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[48] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~47 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a47 ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [48]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~47_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~47 .lut_mask = 16'hCACA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~47 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[47] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~47_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [47]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[47] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[47] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~46 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a46 ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [47]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~46_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~46 .lut_mask = 16'hCACA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~46 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[46] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~46_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [46]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[46] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[46] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~45 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a45~portbdataout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [46]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~45_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~45 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~45 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[45] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~45_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [45]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[45] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[45] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~44 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [45]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a44 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~44_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~44 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~44 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[44] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~44_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [44]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[44] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[44] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~43 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [44]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a43 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~43_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~43 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~43 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[43] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~43_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [43]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[43] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[43] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~42 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [43]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a42 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~42_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~42 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~42 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[42] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~42_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [42]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[42] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[42] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~41 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a41 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [42]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~41_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~41 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~41 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[41] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~41_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [41]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[41] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[41] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~40 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [41]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a40 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~40_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~40 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~40 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[40] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~40_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [40]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[40] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[40] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~39 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a39 ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [40]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~39_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~39 .lut_mask = 16'hCACA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~39 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[39] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~39_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [39]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[39] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[39] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~38 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [39]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a38 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~38_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~38 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~38 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[38] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~38_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [38]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[38] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[38] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~37 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [38]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a37 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~37_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~37 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~37 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[37] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~37_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [37]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[37] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[37] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~36 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [37]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a36~portbdataout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~36_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~36 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~36 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[36] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~36_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [36]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[36] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[36] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~35 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a35 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [36]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~35_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~35 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~35 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[35] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~35_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [35]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[35] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[35] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~34 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [35]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a34 ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~34_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~34 .lut_mask = 16'hB8B8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~34 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[34] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~34_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [34]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[34] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[34] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~33 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a33 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [34]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~33_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~33 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~33 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[33] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~33_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [33]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[33] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[33] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y33_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~32 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a32 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [33]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~32_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~32 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~32 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y33_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[32] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~32_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [32]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[32] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[32] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~31 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [32]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a31 ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~31_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~31 .lut_mask = 16'hB8B8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~31 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[31] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~31_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [31]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~30 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a30 ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [31]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~30_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~30 .lut_mask = 16'hE2E2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~30 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[30] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~30_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [30]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~29 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [30]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a29 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~29_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~29 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~29 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[29] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~29_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [29]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~28 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a28 ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [29]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~28_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~28 .lut_mask = 16'hE2E2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~28 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[28] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~28_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [28]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~27 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a27~portbdataout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [28]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~27_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~27 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~27 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[27] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~27_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [27]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~26 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [27]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a26 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~26_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~26 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~26 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[26] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~26_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [26]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~25 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [26]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a25 ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~25_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~25 .lut_mask = 16'hB8B8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~25 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[25] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~25_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [25]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y32_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~24 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [25]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a24 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~24_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~24 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~24 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y32_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[24] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~24_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [24]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~23 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a23 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [24]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~23_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~23 .lut_mask = 16'hE4E4;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~23 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[23] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~23_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [23]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~22 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [23]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a22 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~22 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[22] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~22_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [22]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~21 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [22]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a21 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~21 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[21] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~21_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [21]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~20 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [21]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a20 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~20 .lut_mask = 16'hACAC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[20] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~19 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a19 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [20]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~19 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[19] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~18 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a18~portbdataout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [19]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~18 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[18] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[9]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[9]~feeder_combout = \segs|_data[1][1]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[9]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[9]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[9]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N23
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[9]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [9]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][9]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][9]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][9]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N9
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][2]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|acq_data_in_reg [10]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][10]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][10]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][10]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y30_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][10]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y30_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[11]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[11]~feeder_combout = \segs|_data[1][3]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][3]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[11]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[11]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[11]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N25
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[11]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][11]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][11]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][11]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X59_Y37_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][11]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][11]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[12]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[12]~feeder_combout = \segs|_data[1][4]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][12]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][12]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][12]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[13]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[13]~feeder_combout = \segs|_data[1][5]~q
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\segs|_data[1][5]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[13]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[13]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[13]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[13]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][13]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][13]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][13]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][13]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][6]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [14]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][14]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][14]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][14]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][14]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N21
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\segs|_data[1][7]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [15]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][15]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][15]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y33_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][15]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][15]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[16]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[16]~feeder_combout = \cpu_addr[0]~input_o
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_addr[0]~input_o ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N1
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [16]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y32_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][16]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y32_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][16]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][16]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][16]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][16]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|acq_data_in_reg[17]~feeder (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|acq_data_in_reg[17]~feeder_combout = GLOBAL(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|acq_data_in_reg[17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|acq_data_in_reg[17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N19
|
|
dffeas \auto_signaltap_0|acq_data_in_reg[17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|acq_data_in_reg[17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|acq_data_in_reg [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|acq_data_in_reg[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|acq_data_in_reg[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|acq_data_in_reg [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[0][17]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][17]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[1][17]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[2][17]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X54_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X53_Y34_N0
|
|
fiftyfivenm_ram_block \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 (
|
|
.portawe(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.ena0(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.ena1(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][17]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][16]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][15]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][14]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][13]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][12]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][11]~q ,\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][10]~q ,
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|acq_data_in_pipe_reg[3][9]~q }),
|
|
.portaaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2],\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]}),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(9'b000000000),
|
|
.portbaddr({\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [9],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [8],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [7],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [6],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [5],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [4],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [3],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [2],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [1],
|
|
\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter|auto_generated|counter_reg_bit [0]}),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(),
|
|
.portbdataout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9_PORTBDATAOUT_bus ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .clk0_core_clock_enable = "ena0";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .clk1_core_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .clk1_input_clock_enable = "ena1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .logical_ram_name = "sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_signaltap_implb:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_il14:auto_generated|ALTSYNCRAM";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "dont_care";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .operation_mode = "dual_port";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_first_bit_number = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_address_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_address_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_address_width = 10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_data_width = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_first_address = 0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_first_bit_number = 9;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_last_address = 1023;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 1024;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_logical_ram_width = 58;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock1";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~17 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [18]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a17 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~17 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[17] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~16 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [17]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a16 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~16 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~15 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [16]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a15 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~15 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~14 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [15]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a14 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~14 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [14]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a13 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~13 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~12 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [13]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a12 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~12 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [12]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a11 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~11 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [11]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a10 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~10 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [10]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a9~portbdataout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~9 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a8 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~8 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y34_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a7 ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~7 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X42_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X37_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~6 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a6 ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~6 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X37_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a5 ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~5 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [5]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a4 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~4 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [4]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a3 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~3 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [3]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a2 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~2 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [2]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a1 ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~1 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y34_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [1]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load~1_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|ram_block1a0~portbdataout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~0 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X32_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|_~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~20 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_data_shift_out|dffs [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~20 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[20] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~19 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [20]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~19 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[19] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~18 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [19]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~18 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[18] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~17 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [18]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~17 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[17] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~16 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~16 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~15 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [16]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~15 .lut_mask = 16'hB8B8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [15]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~14 .lut_mask = 16'hF0AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [14]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2]~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~13 .lut_mask = 16'hCCAA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~4_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~12 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [13]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~12 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~11 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~9_combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~10 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [11]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [9]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~10 .lut_mask = 16'hF0CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~9 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [8]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~9 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [7]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~8 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [6]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~7 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [5]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [7]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~6 .lut_mask = 16'hB8B8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [4]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~5 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [5]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~4 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~3 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y35_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|offset_count~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y35_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~2 .lut_mask = 16'hFC30;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|last_buffer_write_address_sig [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [2]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1 .lut_mask = 16'hB8B8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:done~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0 .lut_mask = 16'h0300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|base_address~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1 .lut_mask = 16'hF2F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y35_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y35_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|is_buffer_wrapped_once_sig~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~0 .lut_mask = 16'hEE22;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y38_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~0_combout ),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3 .lut_mask = 16'h5F00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~8 .lut_mask = 16'h7800;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5 .lut_mask = 16'h6A3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|Add0~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|Add0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|Add0~0 .lut_mask = 16'hC0C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|Add0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|Add0~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~7 .lut_mask = 16'h7800;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2 .lut_mask = 16'hFEFF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~6 .lut_mask = 16'h0700;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~3_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~4 .lut_mask = 16'h4848;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[3]~5_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|~VCC (
|
|
// Equation(s):
|
|
// \auto_signaltap_0|~VCC~combout = VCC
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|~VCC~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|~VCC .lut_mask = 16'hFFFF;
|
|
defparam \auto_signaltap_0|~VCC .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~6 (
|
|
.dataa(\auto_signaltap_0|~GND~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~6 .lut_mask = 16'hCEC2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datab(\auto_signaltap_0|~VCC~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~6_combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~7 .lut_mask = 16'hF858;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~4 (
|
|
.dataa(\auto_signaltap_0|~GND~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~4 .lut_mask = 16'hCEC2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~4_combout ),
|
|
.datac(\auto_signaltap_0|~VCC~combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~5 .lut_mask = 16'hE6C4;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0]~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~7_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~5_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0]~0 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datac(\auto_signaltap_0|~VCC~combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~10 .lut_mask = 16'hDC98;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~11 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~10_combout ),
|
|
.datab(\auto_signaltap_0|~VCC~combout ),
|
|
.datac(\auto_signaltap_0|~VCC~combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~11 .lut_mask = 16'hD8AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~12 (
|
|
.dataa(\auto_signaltap_0|~VCC~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|~VCC~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~12 .lut_mask = 16'hCEC2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~13 (
|
|
.dataa(\auto_signaltap_0|~GND~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~12_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~13 .lut_mask = 16'hEC2C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1]~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~11_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~13_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1]~1 .lut_mask = 16'hEE22;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|~VCC~combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~14 .lut_mask = 16'hB9A8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~15 (
|
|
.dataa(\auto_signaltap_0|~GND~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~14_combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~15 .lut_mask = 16'hBCB0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~16 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|~VCC~combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~16 .lut_mask = 16'hDC98;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~17 (
|
|
.dataa(\auto_signaltap_0|~VCC~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~16_combout ),
|
|
.datad(\auto_signaltap_0|~VCC~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~17 .lut_mask = 16'hF838;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2]~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~15_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~17_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2]~2 .lut_mask = 16'hCCAA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~20 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|~VCC~combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~20 .lut_mask = 16'hDC98;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~21 (
|
|
.dataa(\auto_signaltap_0|~VCC~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~20_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|~VCC~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~21 .lut_mask = 16'hBC8C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~18 (
|
|
.dataa(\auto_signaltap_0|~VCC~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [1]),
|
|
.datad(\auto_signaltap_0|~VCC~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~18 .lut_mask = 16'hE3E0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~19 (
|
|
.dataa(\auto_signaltap_0|~GND~combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~18_combout ),
|
|
.datad(\auto_signaltap_0|~GND~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~19 .lut_mask = 16'hBCB0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~21_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR~19_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~3 .lut_mask = 16'hAACC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|word_counter [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8 .lut_mask = 16'hD5C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9 .lut_mask = 16'h5FA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~3_combout ),
|
|
.asdata(\altera_internal_jtag~TDIUTAP ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8_combout ),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2]~2_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [3]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8_combout ),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1]~1_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [2]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8_combout ),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y37_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0]~0_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [1]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~8_combout ),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[3]~9_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~3 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][4]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][5]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr|WORD_SR [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~3 .lut_mask = 16'hE4A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset .lut_mask = 16'h0020;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [2]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~2 .lut_mask = 16'h3030;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~32 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~32_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~33 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~32 .lut_mask = 16'h33CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~32 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0 .lut_mask = 16'h2000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1 .lut_mask = 16'h0080;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [2]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [3]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~0 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [12]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [14]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [15]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~3 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [9]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [11]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [10]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~2 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X56_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [6]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [5]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [7]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~1 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~3_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~2_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~2 .lut_mask = 16'hF8F8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34 .lut_mask = 16'h5F00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~32_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [1]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~35 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[0]~33 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~35_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~36 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~35 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~35 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~35_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [2]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~37 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [2]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[1]~36 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~37_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~38 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~37 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~37 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~37_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [3]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~39 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[2]~38 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~39_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~40 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~39 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~39 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~39_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [4]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~41 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [4]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[3]~40 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~41_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~42 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~41 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~41 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~41_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [5]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~43 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [5]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[4]~42 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~43_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~44 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~43 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~43 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~43_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [6]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~45 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [6]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[5]~44 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~45_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~46 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~45 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~45 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~45_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [7]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~47 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [7]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[6]~46 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~47_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~48 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~47 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~47 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~47_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [8]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~49 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [8]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[7]~48 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~49_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~50 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~49 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~49 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~49_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [9]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~51 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [9]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[8]~50 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~51_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~52 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~51 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~51 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~51_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [10]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~53 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [10]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[9]~52 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~53_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~54 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~53 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~53 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~53_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [11]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~55 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [11]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[10]~54 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~55_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~56 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~55 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~55 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~55_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [12]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~57 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [12]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[11]~56 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~57_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~58 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~57 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~57 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~57_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [13]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~59 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [13]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[12]~58 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~59_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~60 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~59 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~59 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~59_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [14]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~61 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [14]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[13]~60 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~61_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~62 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~61 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~61 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~61_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [15]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~63 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [15]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[14]~62 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~63_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~64 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~63 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~63 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y38_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~63_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [16]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~65 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [16]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[15]~64 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~65_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~66 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~65 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~65 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~65_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [17]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~67 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [17]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[16]~66 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~67_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~68 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~67 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~67 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~67_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [18]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~69 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [18]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[17]~68 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~69_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~70 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~69 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~69 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~69_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [19]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~71 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [19]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[18]~70 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~71_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~72 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~71 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~71 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~71_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [20]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~73 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [20]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[19]~72 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~73_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~74 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~73 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~73 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~73_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [21]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~75 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [21]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~74 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~75_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~76 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~75 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~75 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~75_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [22]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [21]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~77 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [22]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[21]~76 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~77_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~78 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~77 .lut_mask = 16'h3CCF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~77 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~77_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [23]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [22]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~79 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [23]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[22]~78 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~79_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~80 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~79 .lut_mask = 16'hC303;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~79 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~79_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [24]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [23]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~81 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [24]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[23]~80 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~81_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~82 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~81 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~81 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~81_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [25]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [24]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~83 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [25]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[24]~82 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~83_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~84 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~83 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~83 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~85 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [26]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~84 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~85_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~86 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~85 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~85 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~87 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [27]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~86 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~87_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~88 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~87 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~87 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~89 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [28]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~88 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~89_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~90 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~89 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~89 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~91 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [29]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~90 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~91_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~92 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~91 .lut_mask = 16'hA505;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~91 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~93 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [30]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~92 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~93_combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~94 ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~93 .lut_mask = 16'h5AAF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~93 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X55_Y37_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31]~95 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [31]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~94 ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31]~95_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31]~95 .lut_mask = 16'hA5A5;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31]~95 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31]~95_combout ),
|
|
.asdata(\altera_internal_jtag~TDIUTAP ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [31]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[31] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30]~93_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [31]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [30]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[30] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29]~91_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [30]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [29]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[29] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28]~89_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [29]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [28]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[28] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27]~87_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [28]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [27]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[27] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26]~85_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [27]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [26]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[26] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X55_Y37_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25]~83_combout ),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [26]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~0_combout ),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|process_0~1_combout ),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[20]~34_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [25]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg[25] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y37_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [25]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [27]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [26]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [24]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~7 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y37_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [18]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [19]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [16]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~5 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y37_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [29]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [30]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [31]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [28]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~8 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y37_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [21]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [22]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [20]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [23]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~6 .lut_mask = 16'h0001;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~7_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~5_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~8_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~6_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9 .lut_mask = 16'h8000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~9_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|LessThan0~4_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1 .lut_mask = 16'h00F8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~0 .lut_mask = 16'h2112;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~13 .lut_mask = 16'h1122;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~12 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~12 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [11]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~11 .lut_mask = 16'h3030;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~10 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [10]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~10 .lut_mask = 16'h3030;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~9 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~9 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [8]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~8 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~7 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~7 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [6]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~6 .lut_mask = 16'h0096;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~5 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~4 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~3 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_calc_reset~combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~3 .lut_mask = 16'h3300;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\altera_internal_jtag~TDIUTAP ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~16 .lut_mask = 16'hCC4C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y39_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1 .lut_mask = 16'hA0A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y38_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~15 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [15]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~15 .lut_mask = 16'hDF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y38_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~14 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_1 [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [14]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~14 .lut_mask = 16'hDF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y38_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [13]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [12]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~13 .lut_mask = 16'hF0AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~12 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [11]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~12 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [10]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [11]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~11 .lut_mask = 16'hF3C0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~10 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [10]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~10 .lut_mask = 16'hEE22;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X52_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [8]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~9 .lut_mask = 16'hBB88;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X52_Y38_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~8 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [8]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [7]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~8 .lut_mask = 16'hCCAA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [7]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~7 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [6]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~6 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [5]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~5 .lut_mask = 16'hEE44;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [4]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~4 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~3 .lut_mask = 16'hF5A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~2 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X51_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|cdr~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_gen:tdo_crc_calc|lfsr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~0 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X51_Y38_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~2_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~3_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_val_shift_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~4 .lut_mask = 16'hECA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0 .lut_mask = 16'h55AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1 .lut_mask = 16'h3C3F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y36_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita1~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2 .lut_mask = 16'hA50A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y36_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita2~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3 .lut_mask = 16'h5A5F;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y36_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita3~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4 .lut_mask = 16'hC30C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y36_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~0 .lut_mask = 16'hF0F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita4~0_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0 .lut_mask = 16'hCCFF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y36_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[4]~0_combout ),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal3~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal3~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal3~0 .lut_mask = 16'h0400;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sdr~combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal3~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0 .lut_mask = 16'h2030;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:is_buffer_wrapped~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|segment_shift_var~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal0~3_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|final_trigger_set~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|process_0~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|Equal2~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|segment_shift_var~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|segment_shift_var~0 .lut_mask = 16'hFF10;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|segment_shift_var~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y35_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|segment_shift_var~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|collect_data~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0 .lut_mask = 16'hC080;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_wrapped_delayed~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y35_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][2]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_enable_delayed~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|current_segment_delayed [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:segment_shift_var~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1 .lut_mask = 16'h0C08;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y36_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.cout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~COUT ));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0 .lut_mask = 16'h55AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y36_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|crc_rom_sr_ena~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0 .lut_mask = 16'h0030;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y36_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~COUT ),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~0 .lut_mask = 16'hF0F0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~0 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y36_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0]~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0]~0 .lut_mask = 16'hF7FF;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [3]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [4]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0 .lut_mask = 16'h0004;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y36_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_advance_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1 .lut_mask = 16'hF000;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y36_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_comb_bita0~combout ),
|
|
.asdata(\auto_signaltap_0|~GND~combout ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0]~0_combout ),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_read_pointer_counter|auto_generated|counter_reg_bit [0]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[0]~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[0]~0 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[0]~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[0] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[0]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [0]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[1]~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[1]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[1]~1 .lut_mask = 16'hAACC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[1]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[1]~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[1]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[2]~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[2]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[2]~2 .lut_mask = 16'hAACC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[2]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[2]~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[2]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [2]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[3]~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[3]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[3]~3 .lut_mask = 16'hF0AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[3]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[3]~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[3] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[3]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[4]~4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[4]~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[4]~4 .lut_mask = 16'hF0CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[4]~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[4]~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[4] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[4]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[5]~5 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[5]~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[5]~5 .lut_mask = 16'hF0CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[5]~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[5]~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[5] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[5]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[6]~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[6]~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[6]~6 .lut_mask = 16'hAAF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[6]~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[6]~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[6] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[6]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[7]~7 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[7]~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[7]~7 .lut_mask = 16'hF0CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[7]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[7]~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[7]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [7]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[8]~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[8]~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[8]~8 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[8]~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[8]~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[8]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y38_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [8]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [8]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[9]~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[9]~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[9]~9 .lut_mask = 16'hACAC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[9]~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[9]~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [0]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[11]~11 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[11]~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[11]~11 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[11]~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[11]~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[13]~13 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[13]~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[13]~13 .lut_mask = 16'hE2E2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[13]~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[13]~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[16]~16 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[16]~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[16]~16 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[16]~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[16]~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[17]~17 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[17]~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[17]~17 .lut_mask = 16'hCCAA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[17]~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[17] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[17]~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[18]~18 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]~q ),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[18]~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[18]~18 .lut_mask = 16'hAACC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[18]~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[18] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[18]~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [9]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[20]~20 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[20]~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[20]~20 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[20]~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[20] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[20]~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~20 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [20]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~20 .lut_mask = 16'hFAFA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[20] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [20]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[20] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[20] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [8]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[19]~19 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[19]~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[19]~19 .lut_mask = 16'hCCF0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[19]~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[19] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[19]~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~19 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [20]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [19]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~19 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[19] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~19_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [19]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[19] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[19] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~18 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [18]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [19]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~18 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[18] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [18]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[18] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[18] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~17 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [17]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [18]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~17 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[17] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [17]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[17] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[17] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N26
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~16 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [16]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [17]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~16 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N27
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[16] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [16]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[16] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[16] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N13
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [4]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[15]~15 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15]~q ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[15]~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[15]~15 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[15]~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[15]~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N30
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~15 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [16]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [15]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~15 .lut_mask = 16'hACAC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N31
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[15] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [15]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[15] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[15] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[14]~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[14]~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[14]~14 .lut_mask = 16'hCACA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[14]~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[14]~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N18
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~14 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [15]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [14]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~14 .lut_mask = 16'hACAC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[14] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [14]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[14] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[14] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N22
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~13 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [13]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [14]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~13 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N23
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[13] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [13]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[13] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[13] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N9
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|buffer_write_address_delayed [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[12]~12 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12]~q ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[12]~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[12]~12 .lut_mask = 16'hE2E2;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[12]~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[12]~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~12 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [13]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~12 .lut_mask = 16'hAFA0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[12] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~12_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [12]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[12] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[12] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N14
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [11]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [12]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~11 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N15
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[11] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [11]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[11] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[11] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N19
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[9] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(gnd),
|
|
.asdata(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|sld_buffer_manager_inst|buffer_manager:last_trigger_address_var[9]~q ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(vcc),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y34_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y34_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[0]~1_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y34_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|last_trigger_address_delayed [9]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X44_Y34_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10] (
|
|
.clk(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|wdecoder|auto_generated|eq_node[1]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[10]~10 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[10]~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[10]~10 .lut_mask = 16'hFC0C;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[10]~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|mux|auto_generated|result_node[10]~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~10 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [11]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~10 .lut_mask = 16'hCFC0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[10] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [10]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[10] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[10] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y34_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~9 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [9]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [10]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~9 .lut_mask = 16'hFA0A;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y34_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[9] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [9]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[9] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[9] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~8 (
|
|
.dataa(gnd),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [8]),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [9]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~8 .lut_mask = 16'hF0CC;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N29
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[8] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [8]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[8] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[8] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N10
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [7]),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [8]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~7 .lut_mask = 16'hCCAA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N11
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[7] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [7]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[7] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[7] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~6 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [6]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [7]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~6 .lut_mask = 16'hEE44;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N17
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[6] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~6_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [6]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[6] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[6] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N6
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~5 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [5]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [6]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~5_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~5 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~5 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N7
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[5] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~5_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [5]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[5] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[5] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~4 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [4]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [5]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~4 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N21
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[4] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~3 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [3]),
|
|
.datac(gnd),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [4]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~3 .lut_mask = 16'hEE44;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N1
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[3] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N4
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~2 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~2 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N5
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[2] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [2]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~1 .lut_mask = 16'hF0AA;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N25
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[1] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~0 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~0 .lut_mask = 16'hFA50;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y38_N3
|
|
dffeas \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|_~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|reset_all~clkctrl_outclk ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[0] .is_wysiwyg = "true";
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y38_N12
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][3]~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][7]~q ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|segment_offset_config_deserialize|dffs [0]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_data_shift_out|dffs [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~0 .lut_mask = 16'hE4A0;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~1 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][9]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[2][8]~q ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_crc_len_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~1 .lut_mask = 16'h3202;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7 (
|
|
.dataa(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~6_combout ),
|
|
.datab(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~5_combout ),
|
|
.datac(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~4_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7 .lut_mask = 16'hFFF8;
|
|
defparam \auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [1]),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 .lut_mask = 16'hFAAA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 .lut_mask = 16'hF8F0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ),
|
|
.datad(\auto_signaltap_0|sld_signaltap_body|sld_signaltap_body|tdo_internal~7_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 .lut_mask = 16'hEC20;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 (
|
|
.dataa(gnd),
|
|
.datab(\altera_internal_jtag~TDIUTAP ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 .lut_mask = 16'h00CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [3]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 .lut_mask = 16'hFFCC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [2]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 .lut_mask = 16'h00CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [1]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 .lut_mask = 16'hFFF0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y38_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~12 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 .lut_mask = 16'h33CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~12 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~15 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 .lut_mask = 16'h3C3F;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~15 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~17 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 .lut_mask = 16'hA50A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y39_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal .lut_mask = 16'hC0C0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 .lut_mask = 16'hFF08;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y39_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~17 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~19 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 .lut_mask = 16'h3C3F;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y39_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~19 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 .lut_mask = 16'hA5A5;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y39_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 .lut_mask = 16'hFFFB;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 .lut_mask = 16'h88F8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y39_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y39_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 .lut_mask = 16'hAD00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y39_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 .lut_mask = 16'h0200;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 .lut_mask = 16'hFF0C;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 .lut_mask = 16'h70FE;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~13 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~13 .lut_mask = 16'h1F41;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~14 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~13_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~14 .lut_mask = 16'h0002;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~15 (
|
|
.dataa(\altera_internal_jtag~TDIUTAP ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~14_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~15 .lut_mask = 16'hFF20;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16 .lut_mask = 16'hFFA8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X49_Y39_N1
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~15_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X49_Y39_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~12 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~12 .lut_mask = 16'h8D88;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y39_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~17 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~12_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~17 .lut_mask = 16'h3F00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y39_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~17_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y39_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 .lut_mask = 16'h0D01;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y39_N7
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y39_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 .lut_mask = 16'hAEAA;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y39_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~16_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [0]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~1 .lut_mask = 16'hAAD8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~8 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 .lut_mask = 16'h33CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~11 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~11_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~12 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~11 .lut_mask = 16'h5AAF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~11 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~13 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~12 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~13_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~14 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~13 .lut_mask = 16'hC303;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~13 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15 .lut_mask = 16'hEAC0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y41_N25
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~13_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~14 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~16 .lut_mask = 16'h5A5A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~16 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y41_N27
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~16_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15 .lut_mask = 16'h0001;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N28
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18 .lut_mask = 16'hD5C0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y41_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datac(gnd),
|
|
.datad(vcc),
|
|
.cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~8 ),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9_combout ),
|
|
.cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 ));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 .lut_mask = 16'hC303;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 .sum_lutc_input = "cin";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y41_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y41_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~11_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~18_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~15_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 .lut_mask = 16'h76D8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~18 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~18_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~18 .lut_mask = 16'h0744;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~18 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~13 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~13_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~13 .lut_mask = 16'h8000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~13 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14 (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~13_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14 .lut_mask = 16'hF000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\altera_internal_jtag~TDIUTAP ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [10]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [11]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 .lut_mask = 16'h0400;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N24
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2 .lut_mask = 16'h4000;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N7
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [1]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X50_Y41_N5
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N18
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 .lut_mask = 16'h3300;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 .lut_mask = 16'h0800;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N19
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~18_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 .lut_mask = 16'hEE22;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [1]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder .lut_mask = 16'hF0F0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N31
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N6
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~16 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~16_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~16 .lut_mask = 16'hDC20;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~16 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~17 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~16_combout ),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~15_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~17_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~17 .lut_mask = 16'hFA0A;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~17 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~17_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 .lut_mask = 16'hBB88;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N22
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder .lut_mask = 16'hFF00;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N23
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~21 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~21_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~21 .lut_mask = 16'h141B;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~21 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~22 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~21_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~22_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~22 .lut_mask = 16'hAA8B;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~22 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N8
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~22_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 .lut_mask = 16'hBB88;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N30
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~19 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~19_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~19 .lut_mask = 16'h18ED;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~19 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y41_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~20 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~19_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~20_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~20 .lut_mask = 16'h0C48;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~20 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N12
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [3]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder .lut_mask = 16'hF0F0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N13
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~20_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~14_combout ),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 .lut_mask = 16'hEE22;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N10
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 .lut_mask = 16'h3F3F;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y41_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena .lut_mask = 16'hC8C8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N5
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3_combout ),
|
|
.asdata(\altera_internal_jtag~TDIUTAP ),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [3]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N9
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [3]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [2]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N15
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [2]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [1]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X47_Y41_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0_combout ),
|
|
.asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [1]),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [0]),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N26
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~0 .lut_mask = 16'h3C0C;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~1_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal11~0_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~0_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 .lut_mask = 16'h0804;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X47_Y38_N2
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3_combout ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 .lut_mask = 16'h0A08;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X46_Y38_N16
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4_combout ),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 .lut_mask = 16'hFFF8;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X46_Y38_N17
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo (
|
|
.clk(!\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(vcc),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(vcc),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: CLKCTRL_G10
|
|
fiftyfivenm_clkctrl \altera_internal_jtag~TCKUTAPclkctrl (
|
|
.ena(vcc),
|
|
.inclk({vcc,vcc,vcc,\altera_internal_jtag~TCKUTAP }),
|
|
.clkselect(2'b00),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.outclk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ));
|
|
// synopsys translate_off
|
|
defparam \altera_internal_jtag~TCKUTAPclkctrl .clock_type = "global clock";
|
|
defparam \altera_internal_jtag~TCKUTAPclkctrl .ena_register_mode = "none";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N4
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~4 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~4 .lut_mask = 16'hF0CC;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N5
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg~4_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][0]~2_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X45_Y37_N20
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~10 (
|
|
.dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_irf_reg[1][2]~q ),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~10_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~10 .lut_mask = 16'hF5A0;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~10 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: FF_X45_Y37_N21
|
|
dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] (
|
|
.clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ),
|
|
.d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg~10_combout ),
|
|
.asdata(vcc),
|
|
.clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.aload(gnd),
|
|
.sclr(gnd),
|
|
.sload(gnd),
|
|
.ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~26_combout ),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
|
|
.prn(vcc));
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] .is_wysiwyg = "true";
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] .power_up = "low";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y36_N8
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 (
|
|
.dataa(gnd),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 .lut_mask = 16'h00C0;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X41_Y20_N22
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2] = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout &
|
|
// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] &
|
|
// (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13])))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ),
|
|
.datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] .lut_mask = 16'h0008;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N12
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout ))) #
|
|
// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout ))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2 .lut_mask = 16'hFC22;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N6
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2_combout &
|
|
// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout ) # ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) #
|
|
// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout & \main_memory|altsyncram_component|auto_generated|address_reg_a [0]))))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~2_combout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout ),
|
|
.datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3 .lut_mask = 16'hD8AA;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y10_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a16 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~0_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[0]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_first_bit_number = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X5_Y13_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a0 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode261w [2]),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[0]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y8_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a8 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~1_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[0]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_first_bit_number = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N24
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ) #
|
|
// (\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout &
|
|
// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout ),
|
|
.datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0 .lut_mask = 16'hCCE2;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: M9K_X33_Y6_N0
|
|
fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a24 (
|
|
.portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ),
|
|
.portare(vcc),
|
|
.portaaddrstall(gnd),
|
|
.portbwe(gnd),
|
|
.portbre(vcc),
|
|
.portbaddrstall(gnd),
|
|
.clk0(\cpu_clk|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ),
|
|
.clk1(gnd),
|
|
.ena0(\boot_rom|altsyncram_component|auto_generated|altsyncram1|rden_decode_a|w_anode284w[2]~2_combout ),
|
|
.ena1(vcc),
|
|
.ena2(vcc),
|
|
.ena3(vcc),
|
|
.clr0(gnd),
|
|
.clr1(gnd),
|
|
.portadatain({\cpu_data[0]~input_o }),
|
|
.portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o ,
|
|
\cpu_addr[0]~input_o }),
|
|
.portabyteenamasks(1'b1),
|
|
.portbdatain(1'b0),
|
|
.portbaddr(13'b0000000000000),
|
|
.portbbyteenamasks(1'b1),
|
|
.devclrn(devclrn),
|
|
.devpor(devpor),
|
|
.portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a24_PORTADATAOUT_bus ),
|
|
.portbdataout());
|
|
// synopsys translate_off
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .clk0_core_clock_enable = "ena0";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .data_interleave_offset_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .data_interleave_width_in_bits = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .operation_mode = "single_port";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_address_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_byte_enable_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_data_out_clear = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_data_out_clock = "none";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_first_address = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_first_bit_number = 0;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_last_address = 8191;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_logical_ram_depth = 32768;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_logical_ram_width = 8;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_a_read_during_write_mode = "new_data_with_nbe_read";
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_b_address_width = 13;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_b_data_width = 1;
|
|
defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .ram_block_type = "M9K";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N10
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0_combout &
|
|
// (((\main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0_combout &
|
|
// (\main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))))
|
|
|
|
.dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ),
|
|
.datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~0_combout ),
|
|
.datac(\main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ),
|
|
.datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1 .lut_mask = 16'hE2CC;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X32_Y13_N16
|
|
fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4 (
|
|
// Equation(s):
|
|
// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4_combout = (\decode|LessThan1~0_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1_combout ))) # (!\decode|LessThan1~0_combout &
|
|
// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3_combout ))
|
|
|
|
.dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~3_combout ),
|
|
.datab(gnd),
|
|
.datac(\decode|LessThan1~0_combout ),
|
|
.datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~1_combout ),
|
|
.cin(gnd),
|
|
.combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4 .lut_mask = 16'hFA0A;
|
|
defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux6|result_node[0]~4 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N14
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr6~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr6~0_combout = (\segs|_data[0][3]~q & (\segs|_data[0][0]~q & (\segs|_data[0][2]~q $ (\segs|_data[0][1]~q )))) # (!\segs|_data[0][3]~q & (!\segs|_data[0][1]~q & (\segs|_data[0][2]~q $ (\segs|_data[0][0]~q ))))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr6~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr6~0 .lut_mask = 16'h2904;
|
|
defparam \segs|hex_drivers[0]|WideOr6~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N8
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr5~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr5~0_combout = (\segs|_data[0][3]~q & ((\segs|_data[0][0]~q & ((\segs|_data[0][1]~q ))) # (!\segs|_data[0][0]~q & (\segs|_data[0][2]~q )))) # (!\segs|_data[0][3]~q & (\segs|_data[0][2]~q & (\segs|_data[0][1]~q $
|
|
// (\segs|_data[0][0]~q ))))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr5~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr5~0 .lut_mask = 16'hA4C8;
|
|
defparam \segs|hex_drivers[0]|WideOr5~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N2
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr4~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr4~0_combout = (\segs|_data[0][3]~q & (\segs|_data[0][2]~q & ((\segs|_data[0][1]~q ) # (!\segs|_data[0][0]~q )))) # (!\segs|_data[0][3]~q & (!\segs|_data[0][2]~q & (\segs|_data[0][1]~q & !\segs|_data[0][0]~q )))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr4~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr4~0 .lut_mask = 16'h8098;
|
|
defparam \segs|hex_drivers[0]|WideOr4~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N4
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr3~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr3~0_combout = (\segs|_data[0][1]~q & ((\segs|_data[0][2]~q & ((\segs|_data[0][0]~q ))) # (!\segs|_data[0][2]~q & (\segs|_data[0][3]~q & !\segs|_data[0][0]~q )))) # (!\segs|_data[0][1]~q & (!\segs|_data[0][3]~q &
|
|
// (\segs|_data[0][2]~q $ (\segs|_data[0][0]~q ))))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr3~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr3~0 .lut_mask = 16'hC124;
|
|
defparam \segs|hex_drivers[0]|WideOr3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N22
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr2~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr2~0_combout = (\segs|_data[0][1]~q & (!\segs|_data[0][3]~q & ((\segs|_data[0][0]~q )))) # (!\segs|_data[0][1]~q & ((\segs|_data[0][2]~q & (!\segs|_data[0][3]~q )) # (!\segs|_data[0][2]~q & ((\segs|_data[0][0]~q )))))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr2~0 .lut_mask = 16'h5704;
|
|
defparam \segs|hex_drivers[0]|WideOr2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N24
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr1~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr1~0_combout = (\segs|_data[0][2]~q & (\segs|_data[0][0]~q & (\segs|_data[0][3]~q $ (\segs|_data[0][1]~q )))) # (!\segs|_data[0][2]~q & (!\segs|_data[0][3]~q & ((\segs|_data[0][1]~q ) # (\segs|_data[0][0]~q ))))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr1~0 .lut_mask = 16'h5910;
|
|
defparam \segs|hex_drivers[0]|WideOr1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y32_N10
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[0]|WideOr0~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[0]|WideOr0~0_combout = (\segs|_data[0][0]~q & ((\segs|_data[0][3]~q ) # (\segs|_data[0][2]~q $ (\segs|_data[0][1]~q )))) # (!\segs|_data[0][0]~q & ((\segs|_data[0][1]~q ) # (\segs|_data[0][3]~q $ (\segs|_data[0][2]~q ))))
|
|
|
|
.dataa(\segs|_data[0][3]~q ),
|
|
.datab(\segs|_data[0][2]~q ),
|
|
.datac(\segs|_data[0][1]~q ),
|
|
.datad(\segs|_data[0][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[0]|WideOr0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[0]|WideOr0~0 .lut_mask = 16'hBEF6;
|
|
defparam \segs|hex_drivers[0]|WideOr0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N6
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr6~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr6~0_combout = (\segs|_data[0][6]~q & (!\segs|_data[0][5]~q & (\segs|_data[0][7]~q $ (!\segs|_data[0][4]~q )))) # (!\segs|_data[0][6]~q & (\segs|_data[0][4]~q & (\segs|_data[0][5]~q $ (!\segs|_data[0][7]~q ))))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr6~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr6~0 .lut_mask = 16'h6102;
|
|
defparam \segs|hex_drivers[1]|WideOr6~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N8
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr5~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr5~0_combout = (\segs|_data[0][5]~q & ((\segs|_data[0][4]~q & ((\segs|_data[0][7]~q ))) # (!\segs|_data[0][4]~q & (\segs|_data[0][6]~q )))) # (!\segs|_data[0][5]~q & (\segs|_data[0][6]~q & (\segs|_data[0][7]~q $
|
|
// (\segs|_data[0][4]~q ))))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr5~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr5~0 .lut_mask = 16'hC2A8;
|
|
defparam \segs|hex_drivers[1]|WideOr5~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N10
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr4~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr4~0_combout = (\segs|_data[0][6]~q & (\segs|_data[0][7]~q & ((\segs|_data[0][5]~q ) # (!\segs|_data[0][4]~q )))) # (!\segs|_data[0][6]~q & (\segs|_data[0][5]~q & (!\segs|_data[0][7]~q & !\segs|_data[0][4]~q )))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr4~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr4~0 .lut_mask = 16'h80A4;
|
|
defparam \segs|hex_drivers[1]|WideOr4~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N12
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr3~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr3~0_combout = (\segs|_data[0][5]~q & ((\segs|_data[0][6]~q & ((\segs|_data[0][4]~q ))) # (!\segs|_data[0][6]~q & (\segs|_data[0][7]~q & !\segs|_data[0][4]~q )))) # (!\segs|_data[0][5]~q & (!\segs|_data[0][7]~q &
|
|
// (\segs|_data[0][6]~q $ (\segs|_data[0][4]~q ))))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr3~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr3~0 .lut_mask = 16'h8942;
|
|
defparam \segs|hex_drivers[1]|WideOr3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N30
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr2~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr2~0_combout = (\segs|_data[0][5]~q & (((!\segs|_data[0][7]~q & \segs|_data[0][4]~q )))) # (!\segs|_data[0][5]~q & ((\segs|_data[0][6]~q & (!\segs|_data[0][7]~q )) # (!\segs|_data[0][6]~q & ((\segs|_data[0][4]~q )))))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr2~0 .lut_mask = 16'h1F02;
|
|
defparam \segs|hex_drivers[1]|WideOr2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N16
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr1~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr1~0_combout = (\segs|_data[0][6]~q & (\segs|_data[0][4]~q & (\segs|_data[0][5]~q $ (\segs|_data[0][7]~q )))) # (!\segs|_data[0][6]~q & (!\segs|_data[0][7]~q & ((\segs|_data[0][5]~q ) # (\segs|_data[0][4]~q ))))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr1~0 .lut_mask = 16'h2D04;
|
|
defparam \segs|hex_drivers[1]|WideOr1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y31_N26
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[1]|WideOr0~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[1]|WideOr0~0_combout = (\segs|_data[0][4]~q & ((\segs|_data[0][7]~q ) # (\segs|_data[0][6]~q $ (\segs|_data[0][5]~q )))) # (!\segs|_data[0][4]~q & ((\segs|_data[0][5]~q ) # (\segs|_data[0][6]~q $ (\segs|_data[0][7]~q ))))
|
|
|
|
.dataa(\segs|_data[0][6]~q ),
|
|
.datab(\segs|_data[0][5]~q ),
|
|
.datac(\segs|_data[0][7]~q ),
|
|
.datad(\segs|_data[0][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[1]|WideOr0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[1]|WideOr0~0 .lut_mask = 16'hF6DE;
|
|
defparam \segs|hex_drivers[1]|WideOr0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N16
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr6~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr6~0_combout = (\segs|_data[1][3]~q & (\segs|_data[1][0]~q & (\segs|_data[1][1]~q $ (\segs|_data[1][2]~q )))) # (!\segs|_data[1][3]~q & (!\segs|_data[1][1]~q & (\segs|_data[1][2]~q $ (\segs|_data[1][0]~q ))))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr6~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr6~0 .lut_mask = 16'h4910;
|
|
defparam \segs|hex_drivers[2]|WideOr6~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N2
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr5~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr5~0_combout = (\segs|_data[1][1]~q & ((\segs|_data[1][0]~q & (\segs|_data[1][3]~q )) # (!\segs|_data[1][0]~q & ((\segs|_data[1][2]~q ))))) # (!\segs|_data[1][1]~q & (\segs|_data[1][2]~q & (\segs|_data[1][3]~q $
|
|
// (\segs|_data[1][0]~q ))))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr5~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr5~0 .lut_mask = 16'h98E0;
|
|
defparam \segs|hex_drivers[2]|WideOr5~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N28
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr4~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr4~0_combout = (\segs|_data[1][3]~q & (\segs|_data[1][2]~q & ((\segs|_data[1][1]~q ) # (!\segs|_data[1][0]~q )))) # (!\segs|_data[1][3]~q & (\segs|_data[1][1]~q & (!\segs|_data[1][2]~q & !\segs|_data[1][0]~q )))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr4~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr4~0 .lut_mask = 16'h80C2;
|
|
defparam \segs|hex_drivers[2]|WideOr4~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N6
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr3~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr3~0_combout = (\segs|_data[1][1]~q & ((\segs|_data[1][2]~q & ((\segs|_data[1][0]~q ))) # (!\segs|_data[1][2]~q & (\segs|_data[1][3]~q & !\segs|_data[1][0]~q )))) # (!\segs|_data[1][1]~q & (!\segs|_data[1][3]~q &
|
|
// (\segs|_data[1][2]~q $ (\segs|_data[1][0]~q ))))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr3~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr3~0 .lut_mask = 16'hA118;
|
|
defparam \segs|hex_drivers[2]|WideOr3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N8
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr2~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr2~0_combout = (\segs|_data[1][1]~q & (!\segs|_data[1][3]~q & ((\segs|_data[1][0]~q )))) # (!\segs|_data[1][1]~q & ((\segs|_data[1][2]~q & (!\segs|_data[1][3]~q )) # (!\segs|_data[1][2]~q & ((\segs|_data[1][0]~q )))))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr2~0 .lut_mask = 16'h3710;
|
|
defparam \segs|hex_drivers[2]|WideOr2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N18
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr1~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr1~0_combout = (\segs|_data[1][1]~q & (!\segs|_data[1][3]~q & ((\segs|_data[1][0]~q ) # (!\segs|_data[1][2]~q )))) # (!\segs|_data[1][1]~q & (\segs|_data[1][0]~q & (\segs|_data[1][3]~q $ (!\segs|_data[1][2]~q ))))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr1~0 .lut_mask = 16'h6302;
|
|
defparam \segs|hex_drivers[2]|WideOr1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X59_Y37_N12
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[2]|WideOr0~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[2]|WideOr0~0_combout = (\segs|_data[1][0]~q & ((\segs|_data[1][3]~q ) # (\segs|_data[1][1]~q $ (\segs|_data[1][2]~q )))) # (!\segs|_data[1][0]~q & ((\segs|_data[1][1]~q ) # (\segs|_data[1][3]~q $ (\segs|_data[1][2]~q ))))
|
|
|
|
.dataa(\segs|_data[1][1]~q ),
|
|
.datab(\segs|_data[1][3]~q ),
|
|
.datac(\segs|_data[1][2]~q ),
|
|
.datad(\segs|_data[1][0]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[2]|WideOr0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[2]|WideOr0~0 .lut_mask = 16'hDEBE;
|
|
defparam \segs|hex_drivers[2]|WideOr0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N8
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr6~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr6~0_combout = (\segs|_data[1][7]~q & (\segs|_data[1][4]~q & (\segs|_data[1][5]~q $ (\segs|_data[1][6]~q )))) # (!\segs|_data[1][7]~q & (!\segs|_data[1][5]~q & (\segs|_data[1][6]~q $ (\segs|_data[1][4]~q ))))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr6~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr6~0 .lut_mask = 16'h2910;
|
|
defparam \segs|hex_drivers[3]|WideOr6~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N26
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr5~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr5~0_combout = (\segs|_data[1][7]~q & ((\segs|_data[1][4]~q & (\segs|_data[1][5]~q )) # (!\segs|_data[1][4]~q & ((\segs|_data[1][6]~q ))))) # (!\segs|_data[1][7]~q & (\segs|_data[1][6]~q & (\segs|_data[1][5]~q $
|
|
// (\segs|_data[1][4]~q ))))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr5~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr5~0 .lut_mask = 16'h98E0;
|
|
defparam \segs|hex_drivers[3]|WideOr5~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N10
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr4~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr4~0_combout = (\segs|_data[1][7]~q & (\segs|_data[1][6]~q & ((\segs|_data[1][5]~q ) # (!\segs|_data[1][4]~q )))) # (!\segs|_data[1][7]~q & (\segs|_data[1][5]~q & (!\segs|_data[1][6]~q & !\segs|_data[1][4]~q )))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr4~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr4~0 .lut_mask = 16'h80A4;
|
|
defparam \segs|hex_drivers[3]|WideOr4~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N28
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr3~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr3~0_combout = (\segs|_data[1][5]~q & ((\segs|_data[1][6]~q & ((\segs|_data[1][4]~q ))) # (!\segs|_data[1][6]~q & (\segs|_data[1][7]~q & !\segs|_data[1][4]~q )))) # (!\segs|_data[1][5]~q & (!\segs|_data[1][7]~q &
|
|
// (\segs|_data[1][6]~q $ (\segs|_data[1][4]~q ))))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr3~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr3~0 .lut_mask = 16'hC118;
|
|
defparam \segs|hex_drivers[3]|WideOr3~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N12
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr2~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr2~0_combout = (\segs|_data[1][5]~q & (!\segs|_data[1][7]~q & ((\segs|_data[1][4]~q )))) # (!\segs|_data[1][5]~q & ((\segs|_data[1][6]~q & (!\segs|_data[1][7]~q )) # (!\segs|_data[1][6]~q & ((\segs|_data[1][4]~q )))))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr2~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr2~0 .lut_mask = 16'h5710;
|
|
defparam \segs|hex_drivers[3]|WideOr2~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X54_Y33_N30
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr1~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr1~0_combout = (\segs|_data[1][5]~q & (!\segs|_data[1][7]~q & ((\segs|_data[1][4]~q ) # (!\segs|_data[1][6]~q )))) # (!\segs|_data[1][5]~q & (\segs|_data[1][4]~q & (\segs|_data[1][7]~q $ (!\segs|_data[1][6]~q ))))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr1~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr1~0 .lut_mask = 16'h6504;
|
|
defparam \segs|hex_drivers[3]|WideOr1~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y31_N22
|
|
fiftyfivenm_lcell_comb \segs|hex_drivers[3]|WideOr0~0 (
|
|
// Equation(s):
|
|
// \segs|hex_drivers[3]|WideOr0~0_combout = (\segs|_data[1][4]~q & ((\segs|_data[1][7]~q ) # (\segs|_data[1][5]~q $ (\segs|_data[1][6]~q )))) # (!\segs|_data[1][4]~q & ((\segs|_data[1][5]~q ) # (\segs|_data[1][7]~q $ (\segs|_data[1][6]~q ))))
|
|
|
|
.dataa(\segs|_data[1][7]~q ),
|
|
.datab(\segs|_data[1][5]~q ),
|
|
.datac(\segs|_data[1][6]~q ),
|
|
.datad(\segs|_data[1][4]~q ),
|
|
.cin(gnd),
|
|
.combout(\segs|hex_drivers[3]|WideOr0~0_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \segs|hex_drivers[3]|WideOr0~0 .lut_mask = 16'hBEDE;
|
|
defparam \segs|hex_drivers[3]|WideOr0~0 .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X42_Y38_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|~GND (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|~GND~combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|~GND .lut_mask = 16'h0000;
|
|
defparam \auto_hub|~GND .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X44_Y37_N0
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ),
|
|
.datad(gnd),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell .lut_mask = 16'h0F0F;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: LCCOMB_X50_Y41_N14
|
|
fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell (
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]),
|
|
.cin(gnd),
|
|
.combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell_combout ),
|
|
.cout());
|
|
// synopsys translate_off
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell .lut_mask = 16'h00FF;
|
|
defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell .sum_lutc_input = "datac";
|
|
// synopsys translate_on
|
|
|
|
// Location: IOIBUF_X24_Y0_N8
|
|
fiftyfivenm_io_ibuf \cpu_mlb~input (
|
|
.i(cpu_mlb),
|
|
.ibar(gnd),
|
|
.nsleep(vcc),
|
|
.o(\cpu_mlb~input_o ));
|
|
// synopsys translate_off
|
|
defparam \cpu_mlb~input .bus_hold = "false";
|
|
defparam \cpu_mlb~input .listen_to_nsleep_signal = "false";
|
|
defparam \cpu_mlb~input .simulate_z_as = "z";
|
|
// synopsys translate_on
|
|
|
|
// Location: UNVM_X0_Y40_N40
|
|
fiftyfivenm_unvm \~QUARTUS_CREATED_UNVM~ (
|
|
.arclk(vcc),
|
|
.arshft(vcc),
|
|
.drclk(vcc),
|
|
.drshft(vcc),
|
|
.drdin(vcc),
|
|
.nprogram(vcc),
|
|
.nerase(vcc),
|
|
.nosc_ena(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.par_en(vcc),
|
|
.xe_ye(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.se(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.ardin(23'b11111111111111111111111),
|
|
.busy(\~QUARTUS_CREATED_UNVM~~busy ),
|
|
.osc(),
|
|
.bgpbusy(),
|
|
.sp_pass(),
|
|
.se_pass(),
|
|
.drdout());
|
|
// synopsys translate_off
|
|
defparam \~QUARTUS_CREATED_UNVM~ .addr_range1_end_addr = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .addr_range1_offset = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .addr_range2_offset = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .is_compressed_image = "false";
|
|
defparam \~QUARTUS_CREATED_UNVM~ .is_dual_boot = "false";
|
|
defparam \~QUARTUS_CREATED_UNVM~ .is_eram_skip = "false";
|
|
defparam \~QUARTUS_CREATED_UNVM~ .max_ufm_valid_addr = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .max_valid_addr = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .min_ufm_valid_addr = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .min_valid_addr = -1;
|
|
defparam \~QUARTUS_CREATED_UNVM~ .part_name = "quartus_created_unvm";
|
|
defparam \~QUARTUS_CREATED_UNVM~ .reserve_block = "true";
|
|
// synopsys translate_on
|
|
|
|
// Location: ADCBLOCK_X43_Y52_N0
|
|
fiftyfivenm_adcblock \~QUARTUS_CREATED_ADC1~ (
|
|
.soc(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.usr_pwd(vcc),
|
|
.tsen(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.clkin_from_pll_c0(gnd),
|
|
.chsel({\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout }),
|
|
.eoc(\~QUARTUS_CREATED_ADC1~~eoc ),
|
|
.dout());
|
|
// synopsys translate_off
|
|
defparam \~QUARTUS_CREATED_ADC1~ .analog_input_pin_mask = 0;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .clkdiv = 1;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .device_partname_fivechar_prefix = "none";
|
|
defparam \~QUARTUS_CREATED_ADC1~ .is_this_first_or_second_adc = 1;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .prescalar = 0;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .pwd = 1;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .refsel = 0;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .reserve_block = "true";
|
|
defparam \~QUARTUS_CREATED_ADC1~ .testbits = 66;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .tsclkdiv = 1;
|
|
defparam \~QUARTUS_CREATED_ADC1~ .tsclksel = 0;
|
|
// synopsys translate_on
|
|
|
|
// Location: ADCBLOCK_X43_Y51_N0
|
|
fiftyfivenm_adcblock \~QUARTUS_CREATED_ADC2~ (
|
|
.soc(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.usr_pwd(vcc),
|
|
.tsen(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.clkin_from_pll_c0(gnd),
|
|
.chsel({\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout ,\~QUARTUS_CREATED_GND~I_combout }),
|
|
.eoc(\~QUARTUS_CREATED_ADC2~~eoc ),
|
|
.dout());
|
|
// synopsys translate_off
|
|
defparam \~QUARTUS_CREATED_ADC2~ .analog_input_pin_mask = 0;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .clkdiv = 1;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .device_partname_fivechar_prefix = "none";
|
|
defparam \~QUARTUS_CREATED_ADC2~ .is_this_first_or_second_adc = 2;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .prescalar = 0;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .pwd = 1;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .refsel = 0;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .reserve_block = "true";
|
|
defparam \~QUARTUS_CREATED_ADC2~ .testbits = 66;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .tsclkdiv = 1;
|
|
defparam \~QUARTUS_CREATED_ADC2~ .tsclksel = 0;
|
|
// synopsys translate_on
|
|
|
|
endmodule
|