Byron Lathi 63b942e29a Merge branch 'sdram' into 'master' ...

Add SDRAM controller (controller)

See merge request bslathi19/super6502!7

2022-03-17 22:57:16 +00:00

hw

Move SDRAM and state machine into its own file

2022-03-17 17:49:20 -05:00

sw

new testing program

2022-03-17 15:05:37 -05:00

.gitlab-ci.yml

Add platform generation to build stage

2022-03-17 14:25:26 -05:00

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5.5 MiB

Languages

SystemVerilog 47.7%

Verilog 41.8%

Python 4.8%

VHDL 2%

Assembly 2%

Other 1.6%